八脚25系列的BIOS用什么编程器刷bios哭可以刷
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时间：2017-02-12 16:31
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精英G31T-M7刷BIOS
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BIOS芯片应该是右上角的小的那芯片 那张标上面是写的是686&&AMIBIOS VX52&&5466
我要买什么样子的编程器刷 BIOS程序要去哪下呢
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那个貌似不是BOIS，是IO。真正的BOIS在你发的图右上角，上面有白漆的八脚芯片！！
楼主说得对,&
同意楼主: 5 &
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那是IO啊。兄弟。编程器一定要买好一点的。，
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蛋蛋网络/hx鹏仔 发表于
那是IO啊。兄弟。编程器一定要买好一点的。，
我知道是io啊 io上帖了bios型号才照进去的
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管红波 发表于
那个貌似不是BOIS，是IO。真正的BOIS在你发的图右上角，上面有白漆的八脚芯片！！
恩 这个我知道
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我也想知道,BIOS要怎么刷的吗
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西尔特500p
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我刚在深圳赛格买了一台西尔特500P，1250元，很好用，基本都可以刷的！
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这个芯片是25系列的编程器几乎都能刷写，不一定非得买上千元的，几百元的就足够了
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在插槽里八脚的那个就是
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头像被屏蔽
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多年硬件维修经验.资深数据恢复工程师
&&PCI插槽那里，一个八角的插件BIOS，可以撬下来刷。我们一般用希尔特的再买几个座子就可以刷了。然后BIOS根据版号下载！
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铜牌维客, 积分 138, 距离下一级还需 62 积分
同意用 希尔特500p的说法&&我就是500p& & 台机 笔记本&&通杀超好用
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西特尔的编程器确实也是有点贵了，买个一般的也都能刷这种DIP封装的了。
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志成电脑维修 发表于
我刚在深圳赛格买了一台西尔特500P，1250元，很好用，基本都可以刷的！
有没有便宜点的那种推荐啊
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鸿鹄专业电脑 发表于
PCI插槽那里，一个八角的插件BIOS，可以撬下来刷。我们一般用希尔特的再买几个座子就可以刷了。然后BIOS根 ...
哪有的下能给个网站连接不
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war 发表于
有没有便宜点的那种推荐啊
还是买个差不点儿的吧，一步到位了，不然买个便宜的，以后有很多芯片都刷不了，还是要重新再买，西尔特500P这个性价比相当不错了，很给力！
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他们家在深圳赛格三楼有实体店的，我在深圳呆了一年，去过他们店里，都是正品行货可以放心购买，然后座子有好多种，常用的基本6种就可以了，这是他们的淘宝名字：wei623d
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现在的BIOS多是8脚的25系列，& &买个几十的CH341A编程器就可写好多的25芯片了 。
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是的，8脚多了
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张洪水 发表于
现在的BIOS多是8脚的25系列，& &买个几十的CH341A编程器就可写好多的25芯片了 。
好的 谢谢。
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AMIBIOS8 Architecture
BootBlock
1. ROM image --- ROMimage.doc
2. Everything start from here:
CPU Reset Ve
ctor at FFFFFFF0h
cpu_reset_vector
core\bbend.asm
ORG f000:fff0
3. CPU, Chipset Initialization
PutCPUInFLatMode
core\src\ub.asm
Places the CPU in Big Real Mode (Flat Mode).
This routine goes to FLAT protected mode and sets DS, ES
with 4GB limit starting at physical address
comes back to real mode with DS, ES limit set to 4GB.
4. Recovery support
ProgramNewRomImage_FAR
Token = &BOOT_BLOCK& &=& &1&
= &Programs new ROM image into the FLASH part.&
ProcessNewRomImage_FAR
Token = &BOOT_BLOCK& &=& &2&
= &Replaces the current ROM image in memory with the
new ROM image obtained from FLASH Recovery procedures.&
5. Decompress the main BIOS
CopyBBToRAMAndGiveControl
core\src\up.asm
This routine copies the BootBlock to RAM and transfers control
FFFFXXXX ---& 8000:xxxx
See the relative files:
1.build\init.map
2.build\bblock.cfg
3.build\init.loc
BBExecuteUCode_FAR
build\bbkernel.asm
FormRomImage_FAR
core\src\up.asm
Forms the ROM image in the buffer above 1MB
at memory location defined by the equate PTR_TO_ROM_IMAGE.
and copy ROM image to buffer
PTR_TO_ROM_IMAGE EQU 120000h ;1M:128K (core\src\cf.asm)
GiveControlToInterfaceModule_FAR core\src\up.asm
This routine finds the Interface module in the BIOS image
(in RAM) and copies to lower memory where it will reside
through POST.
Once the module is copied to lower memory,
control goes to Interface module to continue with POST.
Control never comes back to BootBlock code after this point.
call cs:Interface_Module_entry_point
Interface Module = uui.obj + uzdat.obj + uz.obj
decompress_main_BIOS_FAR
core\src\uui.asm
This routine decompresses the complete BIOS code and copies
all the BIOS segments to its final destination.
bbc_uncompress_ Uncompress BIOS module.
(umcompress to 2A0000h, for example)
call CopyBIOSSegs
Copies the different BIOS segments from the
SLAB module into their final destination in memory.
6. Check point D0-DA
7. Flowchart
BBkernel.asm
POST
Check point 03-00
1. Flowchart
Kernel.asm
====================================================
CORE eModule
Flash and GPNV
1.Any Flash Part datasheet
POSTINT09h
PMM (POST Memory Manager)
1.POST Memory Manager Specification
POST Error Management
DIM
ADM (AMI Display manager)
1.AMI Display Manager functional and API Definition
1.Information Technology AT Attachment with Packet Interface - 6
(ATA/ATAPI-6)
1.BIOS Boot Specification
2.AMIBIOS8 BIOS Boot Specification Developer's Reference
Silent Boot
Setup (Client/Server)
1.AMIBIOS Setup Script Processor(SSP) Specification
--------------------------------------------------------------------------
Add/Remove when Build BIOS
1.CPU Configuration Module(CCM) Specification
Chipset
NB
SB
1.SMI Module Technical Reference Guide
1.System Management BIOS (SMBIOS) reference specification
1. Advanced Configuration and Power Interface Specification
=========================================================
CORE Feature
Flash and GPNV
1.Flash parts Classified:
Flash part size - 1MByte, 512KByte, 256KByte
Flash Interface type - Standard(ISA), LPC, FWH
BootBlock size - 64KByte, 16KByte
All parameters are selected at build time by FLASH.sdl
2.Memory Map
2.1 Device Memory Map
2.2 Boot-Configuration and System Memory Map
Example:SST49LF004.pdf
3.GPNV - General Purpose Non-Volatile
Introduced in SMBIOS specification
Will only use up to 16KByte - OS Limitation
Used by: ESCD,Event log,SMBIOS data...
Location and Size
Flash part size:512KByte
-- Flash.sdl
BootBlock size - 64KByte
NVRAM_SIZE:64KByte
-- Flash.sdl(the block in which NVRAM reside)
MKF_MEMORY_MAPPED_GPNV_SIZE:16KB
-- oemcfg.asm
GPNV_ESCD_DATA_LENGTH:1000h(4K)
-- oem.sdl
GPNV_SMBIOS_DATA_LENGTH:800h(2K)
-- oem.sdl
GPNV_EVENT_LOG_DATA_LENGTH:400h(1k) -- oem.sdl
4.Data Structure
GPNV_CONFIG_STRUC struc
dw ? ; Data ID
dw ? ; GPNV Handle#
dw ? ; Size in bytes of the area
wStartOffsetInGPNV dw ? ; Start Offset of the area in GPNV
bAttribute
db ? ; Attribute (see below for details)
GPNV_CONFIG_STRUC ends
Example: ESCD Data
{ESCD_DATA_ID,0000h,MKF_GPNV_ESCD_DATA_LENGTH,GPNV_ESCD_DATA_START,00h}
GPNV_DATAID_HEADER_STRUC struc
dw 1 dup(?); Data ID of the area
dw 1 dup(?); GPNV handle# (0-based) of the area
dw 1 dup(?); Total size in bytes of the area including this header
wStartOffsetInGPNV dw 1 dup(?); Start Offset of the area in GPNV
wFreeLocation
dw 1 dup(?); Offset (relative to the start of area) of first free byte in the area
; 0000h/FFFFh -& area is full
; this value can never be less than 10h which is the header length
; i.e. in case the area is empty, the value will be 10h
bAttribute
db 1 dup(?); Attribute (see below for details)
db 5 dup(?); Reserved for future use
GPNV_DATAID_HEADER_STRUC ends
5.Flowchart:
DetectFlashAndNVRAM
core\src\gpnv.asm
InitGPNVArea_FAR
core\src\gpnv.asm
InitializeGPNVStructures
Fills in the handle number and start offset for
all the GPNV data id structures.
1.Read the whole GPNV data to the supplied buffer
2.According to the gpnv_dataid_table modify the
GPNV_DATAID_HEADER_STRUC
3.Write the whole GPNV data from the supplied buffer back to the
--------------------------------------------------------------------------
POSTINT09h
1.Traps the INT09h vector, so that the POST INT09h handler gets
control for IRQ1 durig POST.
Flowchart:
CheckInstallPOSTINT09hHandler_FAR
core\src\i09hdrv.asm
Check POST INT09h Installed?
Check any Input Device?
Save Original INT09h Vector
(CS:dPreINT09hVector)
Trap INT09h to POST INT09h Handler
(POST_CSEG:POSTINT09hHandler)
POSTINT09hHandler
core\src\i09hdrv.asm
ProcessBIOSKeys_FAR
core\src\in.asm
ProcessUserInput_FAR
build\kernel.asm
1.Process BIOS Keys
2.Process User Input optional features
Example:ProcessUserInputForSilentBoot_FAR
core\src\silent.asm
Go to Original INT09H handler
(Not a BIOS Key)
BIOS Keys: POST_DSEG:KernelKeyTbl
core\src\ekdata.asm
stBIOSKey &MKF_CMOS_SETUP_KEY,CMOS_SETUP_REQ_BIT&
2.Puts back the original INT09h vector that was trapped while
in POST INT09h installation.
UninstallPOSTINT09hHandler_FAR
core\src\i09hdrv.asm
--------------------------------------------------------------------------
PMM
1.POST Memory Manager
2.Available only during POST
3.PMM model - Client and Server
Server - PMM Services (a set of function calls)
Client - Internal BIOS code and Option ROMS
4.Data Structure
4.1 PMM Installation Structure definition. core\include\pmm.equ
RUN_CSEG:pmm_installation_structure
PMM_STRUC struc
bSignature db 4 dup(?) ; signature '$PMM'
bRevision db 1 dup(?) ; structure revision
bLength db 1 dup(?) ; structure length in bytes
bChecksum db 1 dup(?) ; checksum
dPtrPMMFunction dd 1 dup(?) ; pointer to PMM function calls
bReserved db 5 dup(?) ; reserved for future use
PMM_STRUC ends
4.2 PMM Data structures (Memory Allocation Entries):
Keep track of the memory that has already been allocated.
PMM_DSEG:PMMDataTable - BYTE Array
;MEMORY_ALLOCATION_STRUC
; MEMORY_ALLOCATION_HEADER_STRUC {}
; MEMORY_ALLOCATION_ENTRY_STRUC {}
; MEMORY_ALLOCATION_ENTRY_STRUC {}
; | | | | |
; | | | | |
; MEMORY_ALLOCATION_ENTRY_STRUC {}
;MEMORY_ALLOCATION_STRUC
4.3 Memory allocation entry structure
MEMORY_ALLOCATION_ENTRY_STRUC
dStartAddress
? start address of the memory block
? size of the memory block in bytes
? associated handle
FFFFFFFF -& anonymous handle
4 dup(?); reserved for future use
MEMORY_ALLOCATION_ENTRY_STRUC
5.Flowchart:
init_pmm_far
core\src\pmm.asm
Add ROM image memory entry (compress ROM)
Add BIG BIOS memroy entry
(uncompress ROM)
Init PMM installation structure
Fill &$PMM& Signature
Fill PMM entry (pointer to PMM function calls)
Update checksum
6.PMM entry
Entry point for PMM in PMM_CSEG.
PMM_CSEG:pmm_entry
core\src\pmm.asm
pmm_function_table LABEL BYTE
offset PMM_CSEG:pmm_func_00 00..PMM Allocate.
offset PMM_CSEG:pmm_func_01 01..PMM Find.
offset PMM_CSEG:pmm_func_02 02..PMM Deallocate.
offset PMM_CSEG:pmm_func_ Invalid PMM function.
pmm_function_table_end
7.Usage example(Client):
allocate_memory
core\src\ui.asm
push 0000h
; PMM allocate function number.
call dword ptr gs:(PMM_STRUC ptr pmm_installation_structure).dPtrPMMFunction
add sp, 12
--------------------------------------------------------------------------
POST Error Management
1.Presents all posted BIOS errors to user and gets the user
response for error recovery.
2.Data Structure
2.1 All POST Error table are defined in BIOSErrorTbl(kernel.asm)
and customer can use Elink to append their own to it.
POST_CSEG:BIOSErrorTbl
build\kernel.asm
OEMErrorTbl
bsp\oemcfg.asm
KernelErrorTbl
core\src\ekdata.asm
CPUErrorTable
bsp\cpu\cpuextfn.asm
USBErrorTable
bsp\em\usb\usboem.asm
KernelErrorTbl
core\src\ekdata.asm
stBIOSError & NO_PS2_MOUSE_ERR, MKF_ATTRIB_NO_PS2_MOUSE_ERR,
0FFFFh,_str$_PS2_Mouse_err &
stBIOSError STRUCT
core\include\mbiosequ.equ
wErrorCode
DW 00000h;Bit[0-7] - Error number.
Bit[8-15] - Module ID.
wErrorAttrib
DW 00000h;Bit[0-3] - Error type.
ERROR_TYPE_MASK EQU 0000Fh
ET_NOT_AN_ERR EQU 00000h
ET_INFORMAL
EQU 00001h
ET_WARNING
EQU 00002h
ET_GENERAL
EQU 00003h
ET_CMOS_RELATED EQU 00004h
EQU 00005h
EQU 00006h ;Reserved for CORE
EQU 00007Furure use.
EQU 00008h
; Types 08-0Fh : can be used bye OEMs
MAPS_TO_SMBIOS_ERR_BIT EQU BIT_4 ;Bit[4]-Set for SMBIOS mapped errs.
Bit[5-15] - RESERVED.
wDisplayErrorInfoProcOffset DW 00h; = 0FFFFh for string token.
wDisplayErrorInfoProcSeg
DW 00h; = Token number for string token.
stBIOSError ENDS
2.2.Table which will be filled during BIOS POST with all Posted
BIOS errors.
POST_DSEG:PostedBIOSErrorTbl
bsp\oemcfg.asm
2.3 Hold the error counter
fs:wPostedBIOSErrorCounter
core\src\ekdata.asm
3.Flowchart:
CP 03h - CP 85h
Post BIOS error to PostedBIOSErrorTbl
Routine:PostBIOSError_FAR
(EKPostBIOSError_FAR) core\src\errmgr.asm
mov ax, NO_PS2_MOUSE_ERR
core\src\kbc.asm
call PostBIOSError_FAR
ProcessPOSTErrors_FAR
core\src\errmgr.asm
Check PostedBIOSErrorTbl and BIOSErrorTbl
Any error posted? Which error?
Display error message(string) and
Get user response for errors.
--------------------------------------------------------------------------
DIM
1. Device Initialization Manager
1.1.Iinitialize all device types including system board devices.
1.2.The DIM contains a list of Device Initializer modules, one of
which handles a single device type (ISA, EISA, PnP ISA, PCI, etc.).
2. Data Structure
2.1 Resource Map Entry Structure
resmap_entry RESMAP_MAX_ENTRIES dup (&&)
resmap_entry
core\include\dim.equ
Resource Map Entry Structure
------------------------------------------------------------------------------
resmap_entry struc
rm_res_type db ? ;RESTYPE_IRQ, RESTYPE_DMA, etc.
rm_res_flags db ? ;RESFLAG_SHARE, RESFLAG_STATIC, etc.
rm_resval_irq resval_irq
rm_resval_dma resval_dma
rm_resval_port resval_port &&
rm_resval_mem resval_mem
rm_owner_sys owner_sys
rm_owner_isa owner_isa
rm_owner_eisa owner_eisa &&
rm_owner_pnp owner_pnp
rm_owner_pci owner_pci
reserved_1 db ?
resmap_entry ends
resval_irq struc
rv_irq_flags db ?
rv_irq_level db ? ;IRQ level number
rv_irq_rsvd db 15 dup (?)
resval_irq ends
owner_pci struc
own_pci_sig db ? ;Set to OWNTYPE_PCI
own_pci_bus db ? ;Bus number of PCI device
own_pci_devfunc db ? ;Dev/Func number of PCI device
own_pci_rsvd db ?
own_pci_vendid dw ? ;Vendor ID of PCI device
own_pci_devid dw ? ;Device ID of PCI device
own_pci_rsvd2 dd ?
owner_pci ends
See resmap1.bmp, resmap11_d.bmp
2.2 DIM_DSEG:NVRamWork
core\src\dimdata.asm
3. Flowchart
See amibios8 dim.ppt
DIMDeviceInitAtEarlyPOST_FAR
core\src\dimif.asm
bus_device_init_1
mov ax, 0000h
;DIM Func 0 - Reset, Detect, Disable
call invoke_dim_far
core\src\dim.asm
1. Calls the Resource Manager to initialize the resource map.
2. Copies NVRam contents into the NVRam workspace (NVRamWork).
DIM_DSEG:NVRamWork
core\src\dimdata.asm
init_nvram_workspace
core\src\dim.asm
3. Calls all Device Initializers.
di_sys_func_0
core\src\di-sys.asm
1.If the NVRam workspace does not contain any device nodes
then copy the device nodes and their default settings
from ROM into the NVRam workspace.
2.Call the hook function to disable any configurable
onboard devices and their corresponding device nodes.
PeripheralTableStart(core\io.asm) ---& build\io.inc
di_isa_func_0
core\src\di-isa.asm
di_pnp_func_0
core\src\di-pnp.asm
1.PnP Isolation Algorithm is done and the two variables
nvrhd_pnp_max_csn and nvrhd_pnp_read_port are updated
in the NVRam workspace.
2.All PnP ISA devices are disabled.
di_pci_func_0
core\src\di-pci.asm
1.Init PCIPeriDevTable: Search all device node(build\io.inc)
that is set to &PTFLAG_INVISIBLE_NODE& (Node is invisible
after boot) then put it in the PCIPeriDevTable.
2.Scan for PCI-PCI bridges, assign bus
numbers, sets MaxPCIBusNumber
3.Prepare BUS# translation table.
build\busnumxlat.inc
Update BUS#s in IRQ routing tbl.
4.Disable all the pci devices except the device is protected
(chipset) or list in the PCIPeriDevTable.
mov ax, 0100h
;DIM Func 1 - Static device init
call invoke_dim_far
di_pci_func_1
core\src\di-pci.asm
1.Get resources needed by each PCI bus
2.Configure any non-compliant PCI devices
mov ax, 0200h
;DIM Func 2 - Boot output device init
call invoke_dim_far
All device initializers are called until one of
them finds a device matching the boot output device settings
bus_device_init_2
mov ax, 0300h
;DIM Func 3 - Boot input device init
call invoke_dim_far
mov ax, 0400h
;DIM Func 4 - IPL device init
call invoke_dim_far
mov ax, 0500h
;DIM Func 5 - General device init
call invoke_dim_far
--------------------------------------------------------------------------
ADM
1.AMI Display Manager
2.A stand-alone binary module
3.Purpose: Handle screen output (256 color graphics/normal text)
4.Modules Overview
-- see ADM.pdf p.11
5.Function List -- see ADM.pdf p.3
6.Flowchart:
InitADMDriver_FAR
core\src\admdrv.asm
Allocate memory for ADM module and uncompress it there.
Give control to ADM module for initialization.
If ADM_FORCE_TEXT_MODE_BIT in wADMFlags is set ADM will be
forced in text mode.
Initialize language and font modules for ADM.
Activate ADM module.
fs:dADMFarEntryPADM far entry. core\include\admcore.equ
See ADM.pdf p.72
--------------------------------------------------------------------------
IDE - Integrated Drive Electronics
ATA - Advanced Technology Attachment
ATAPI - ATA Packet Interface
1.Data Structure
1.1 PnP ATA Data
PnP_ATA_Data struc
core\include\int13pnp.equ
PnPHeader PnP_Header && ;option rom header
FDDheaders FDDUSB_Exp_Header FDD_Header_count dup (&&)
;floppy headers
ATAheaders ATA_Exp_Header ATA_Header_count dup (&&)
;IDE headers
USBheaders FDDUSB_Exp_Header USB_Header_count dup (&&)
;usb headers
PnP_ATA_Data ends
1.2 channel_details_data
core\src\cf.asm
Runtime Data used for Boot device related information.This
is an array of CHANNEL_DETAILS_STRUC structures and holds
information for 4 IDE controllers.
Example:ata_1controller LABEL BYTE
CHANNEL_DETAILS_STRUC {01F0h, 03F6h,
0FC00h, 0EF06h, 0Eh, 00F9h}
CHANNEL_DETAILS_STRUC
wBasePortAddress
? ; Base Port Address
wControlPortAddress
? ; Control Port Address
wBusMasterPortAddress
? ; Bus Master Port Address
? ; ptr to IRQ ISR
? ; IRQ Value
wBusDeviceFunction
? ; Bus#, Device#, Function#
CHANNEL_DETAILS_STRUC
1.3 GS:ATAPI_INFO - Bit-0 - Primary
Master Device Info
Bit-1 - Primary
Device Info
Bit-2 - Secondary Master Device Info
Bit-3 - Secondary Slave
Device Info
Bit-4 - 3rd Channel Master Device Info
Bit-5 - 3rd Channel Slave Device Info
Bit-6 - 4th Channel Master Device Info
Bit-7 - 4th Channel Slave Device Info
0 - No ATAPI Device detected
1 - ATAPI detected
2. Flowchart:
CP 75h
InitPnPATAData_FAR
core\src\int13pe.asm
This procedure initializes the PnP ATA Data structure before
DIM for BBS and i13 device initialization is invoked.
This structure will be used (seen) as an option rom for dim
BBS/i13 drive initialization and will also be used to store
auto-detect data for each IDE drive.
1.Init. the PnP_ATA_Data data structure.
2.Build the far ptr to init_int13_far
(i13 PnP option now contains callf int13_module:bInit
at offset 3)
init_ata_channel_info_FAR
core\src\int13pe.asm
This routine initializes the information about ATA channel
details in runtime segment. this routine is called after ATA
controllers are assigned the resources.
ResetIDEControllers_FAR
core\src\int13pe.asm
This routine resets all the available IDE controllers.
check_presence_of_atapi_devices_FAR core\src\int13pe.asm
This routine checks for presence of ATAPI devices on the
This routine only identifies ATAPI devices but not device
type i.e. CDROM, FLOPTICAL, TAPE, etc.
Aquiredrivedata_FAR
core\src\auto.asm
This routine runs auto detection for each IDE port in the
system. Resulting data is stored inside a PnP expansion
header for each drive, for later access by
find_ata_atapi_device or by int13 init code (now invoked as
an option rom init from dim function 8).
This routine also derives the product string from the Intel
little endian rep insw result and stores it in a product
string field of the expansion header in asciiz format.
auto_hd_type
core\src\auto.asm
This routine detects IDE devices.
init_int13_far
core\src\int13pe.asm
This routine will be invoked When the BBS initialization routine
InitBAIDOptROM_FAR is invoked.
core\src\bbs0.inc
call init_ata_atapi_data_ Initialize ATA/ATAPI data area
call floppy_disk_setup ;Initialize FDD
call physically_find
;Set up 40:10 based on setup questions
call hard_disk_setup
;Initialize ATA/ATAPI devices
call Build_i13_PnP_Struc ;Fills in the PnP/BBS expansion header
;structure of PnP_ATA_Data
--------------------------------------------------------------------------
BBS
1.BIOS Boot Specification
2.Purpose:
2.1.Identify all IPL(Initial Program Loader) devices in the system.
2.2.Prioritize them in the orer that the user selects.
2.3.Sequentially go through each device and attempt to boot.
3.Data Structure
DimVectorMap: sequence of drive letters
EBDVectorMap: copy of DimVectorMap
BBS_Vector0: the vector table begins at this label in BBSVT.ASM
VDLs: sequence of vector DL values that will be used to invoke the i13 handlers
IPLDTableEntry: table of all IPL devices
core\include\bbs.dat
(ipld_table_entry
core\include\bbs.equ)
See IPLDTableEntry.bmp
ipld_table_entry struc
;0/1/2/3/4 = invalid/removable/hdd/cdrom/bev
;0/1/2/3 = invalid/hdd/fdd/bev
VectorIndex db ?
;Holds index into i13VectorMap
;Device type,see Values for owner_???.own_???_sig
ClassCode dw ?
;High byte is B low byte is sub class
ClassType db ?
;class type, see Class type equ
;handle by which i13 handler will recognize
;Device ID
;Vender ID
;offset of BEV within Option ROM Exp Header
;offset of BCV within Option ROM Exp Header
;option rom segment
;BEV segment
PortAddr dw ?
;IDE port addr
PnPRetAX dw ?
;or PnP ret value in AX
;or Resmap addr of device
MastOrSlave db ?
;IDE master/slave info
;IDE/USB for BAIDs
;PCI Bus or CSN for PnP ISA
;PCI DevFunc
DataPortAddr dw ?
;Data port address PNP ISA
BaidType db ?
;Type if BAID
;Dev status for RT functions
;Ptr to dev's menu if it is in sub menu
DevString db 32 dup (?)
;Holds device name. (Only the first 32 chars of that string)
ipld_table_entry ends
IPLPriorityEntry: boot device priority table
See IPLPriorityentry.bmp, HDPriorityEntry.bmp, RDPriorityEntry.bmp
bbs_index_table
db ? ;Holds cmos value (order of execution) for current entry
IPLDTIndex
db ? ;Holds boot order for this device
dw ? ;Holds chksum of devstring
bbs_index_table
HDPriorityEntry: hard drive priority table
RDPriorityEntry: removable device priority table
CDPriorityEntry: ATAPI CDROM priority table
PnP ATA Data Structure: PnP &option ROM& for BAIDs
4.Flowchart
CP 78h
BBSInit_FAR
core\src\bbs0.inc
Sets the BBSConfig variable:
GetBBSConfigFromBuild ; Establish config from BIOS parameters
GetBBSConfigFromCMOS ; Get configuration from CMOS and make flags
OEMGetBBSConfig_FAR ; allow OEM hook to have final
Sets the BBSBootOrder variable:
BBSBootOrder &-- MKF_BBS_IPL_SETUP_DEFAULTS
;Establish from BIOS parameter
GetBBSBootOrderFromCMOS ; allow cmos to overide
OemGetIPLDefaults_FAR ; allow OEM hook to have final
InitBAIDOptROM_FAR
core\src\bbs0.inc
This step invokes the upper level ROM initialization routine
search_resmap_dev_type to initialize the BAID option ROM.
search_ResMap_dev_type
core\src\bbs1.inc
This function Scans the NVRam workspace for IPL candidate
devices of particular kind. For each device found, its
esential info will be stored in IPLDT.
InitPCIOptROMs_FAR
core\src\bbs0.inc
This step invokes the ROM initialization routine
search_resmap_dev_type twice. The first invocation is for BBS
compliant PCI ROMs, and the second is to initialize non-BBS
compliant PCI ROMs.
InitISAOptROMs_FAR
core\src\bbs0.inc
This step invokes the upper level ROM initialization routine
search_resmap_dev_type twice for ISA option ROMs. The first
invocation is for BBS compliant ROMs and the second is to
initialize non-BBS compliant ROMs.
InitISAPnPOptROMs_FAR
core\src\bbs0.inc
As with the previous steps, search_resmap_dev_type twice for
PnP ISA option ROMs.
AddStaticIPLDeviceObjectsToBBS_FAR core\src\bbs0.inc
This routine copies entries from the StaticIplDeviceObjectTbl
structure to BBS's IPLDTableEntry structure.
StaticIplDeviceObjectTbl may be used to hardcode IPL devices
if required.
BBSBuildTables_FAR
core\src\bbs0.inc
At this point, the IPLDTableEntry structure contains entries
for all IPL devices in the system. On entry into this step,
CompareSysConfig is called to determine whether or not system
configuration of setup question values have changed since last
boot. This information will be used later in this step when
priority settings are established for each device.Next, the
subordinate HDPriorityEntry, RDPriorityEntry, CDPriorityEntry
and IPLPriorityEntry tables are derived from the IPLDTableEntry.
The order in which these tables are built is determined by the
default boot order as stored in BBSBootOrder. The routines
build_HDD_table, build_RMD_table, and build_CD_table are called
to build their respective tables. After each routine builds the
table, it calls the main CMOS routine NVCMOSInit to determine boot
priorities for the devices. NVCMOSInit determines how to establish
CMOS priorities based on whether or not system configuration or setup
question values have changed since last boot. Finally,
init_IPL_priorities is called which in turn invokes NVCMOSInit to
establish boot priority settings for the main IPLPriorityEntry table.
BBSConnectDrives_FAR
core\src\bbs0.inc
This step calls the routines dim_func_HD, dim_func_RMD and
dim_func_CDROM. These routines invoke the BCVs and build the
vector table.
BBSFinale_FAR
core\src\bbs0.inc
This finale main step prepares the system for int13 functionality
by preparing the EBDVectorMap. The $BBS runtime structure is also
completed at this point.
CP ABh
BBSBeforeI19_FAR
core\src\bbs2.asm
This routine displays popup menu if hotkey has been
It also sets up for network boot if THAT hotkey
has been pressed.
CMOS boot_first device is also checked (this may have been
set by bbs pnp runtime function 66). Any resulting boot_first
device is then copied to BDA:boot_first. Note that popup menu
has precedence and will override cmos first_boot if user make
a selection. Finally, cmos boot_first is reset to OFF if it
has been set.
BDA:boot_first
--------------------------------------------------------------------------
Silent Boot
1.Small Logo(BIOS Logo), OEM Logo(Silent Logo)
2.Display Logo eModule
2.1.Integrated all display decoder - JPG, BMP, PCX, Legacy format.
= &SMALL_LOGO_FILENAME&
Filename of the Logo to be displayed during booting on the top of
the screen (just a small strip)
= &OEM_LOGO_FILENAME&
Specify the filename for full screen logo to be displayed when
silent boot is enabled.
3.Flowchart
InitBIOSLogoModule_FAR
core\src\out.asm
1. Uncompress the BIOS logo module
2. Updates &dBIOSLogoAddr& to the address of
uncompressed BIOS logo module.
fs:dBIOSLogoAddr
; ptr to BIOS logo.
InitSilentLogoModule_FAR
core\src\silent.asm
1. Uncompress the Silent logo module
2. Updates &dSilentLogoAddr& to the address of
uncompressed Silent logo module.
fs:dSilentLogoAddr
; Addr of Silent logo.
SetInitialDisplayMode_FAR
core\src\silent.asm
Sets the initial display to OEM or BIOS mode as selected by
the user from CMOS setup.
call ChangeDisplayModeToOEM_FAR ; Put display in OEM mode.
call ChangeDisplayModeToBIOS_FAR ; To force BIOS display mode.
--------------------------------------------------------------------------
Setup (Client/Server)
1.Setup Client - Setup.bin
2.Setup Server - Setup Data(SSP, ASD, Control/External function)
Nvram manager code
3.Flowchart
CP 87h
ProcessCMOSSetupRequest_FAR
core\src\cmos.asm
Processes the user request for executing CMOS setup. For any
reason, if CMOS setup execution is not possible, default
values (Failsafe values, if the CMOS is bad and Optimal
values if the CMOS is good) will be loaded into CMOS.
; Run the CMOS setup program.
call ExecuteCmosSetup_FAR core\src\postmian.asm
Before invoke the setup client,
Setup Server has to Pass the:
1.Setup data ptr to Client.
SETSVR_CSEG:SetupDataMasterPointerTable
build\setupdb.asm
2.PMM entry ptr to Client.
PMM_CSEG:pmm_entry
3.ADM entry ptr to Client.
fs:dADMFarEntryPtr
4.NVRAM mgr ptr to Client.
sdsm_entry_rm
core\src\sdsmgr.asm
call cmos_setup_FAR
core\src\sdsvr.asm
gs:dword ptr _setup_ invoke setup client
4.Setup Data
Example:bsp\setup\csp.ssp
bsp\setup\nb.ssp
Example:bsp\setup\nb.asd
4.3 Control/External function
========================================================================
Add/Remove when Build BIOS
1.CCM (CPU Configuration Module)
2.1 Is a Set of self-contained routines and functions
2.1 Purpose: Initialization and configuration of the systems CPU(s).
2.Function List -- see CCM.pdf
3.Flowchart
See cpuflow.txt
-------------------------------------------------------------------------
SIO
1.Super I/O module
2.IO CORE --& ASM file, ASL file
2.1 ASM file - Program IO register, create Device Node for PNP OS
2.2 ASL file - For ACPI OS
3.Example1: see core\src\io\win627h\rcoma.asm
Example2: see core\em\acpi\uart1.asl
bsp\io\win627h\io.asl
4.Flowchart
4.1 At the build time
IODEVICE defined in the SDL file will be included in the build\io.inc
= &SerialPortA&
= &RCOMA.ASM&
= &Uart1.ASL&
ASLdeviceName
Token = &WIN627HF& &=& &1&
di_sys_func_0
core\src\di-sys.asm
call peripheral_register_Init/disable peripheral chip
ProgramPeripheralParameters_FAR
core\src\postmain.asm
call program_peripheral_setup_parameters_far core\src\rt.asm
4.3 Runtime
All PNP runtime function will be invoke via the rt_pnp_entry
See the &Plug and Play Run Time Function Table&
rt_pnp_inst_check_start
core\src\flsnvrg.asm
Plug and Play Installation Check.
rt_pnp_entry
core\src\rt.asm
-------------------------------------------------------------------------
Chipset
NB
SB
-------------------------------------------------------------------------
SMI
1.SMARM Organization
See AMIBIOS8_smi_module_20.pdf p.7
2.Data Structure
2.1 SMI Table
Handler1 Structure
Handler2 Structure
Handler3 Structure
Default handler Sturcture
2.2 SMI Entry Structure
SMI_HEADER STRUCT
SMI_Signature
'$SMI'
Handler_ID
ACTIVATE_CODE
IDENTIFY_CODE
HANDLER_CODE
SMI_HEADER ENDS
Exapmle:csp\em\smi\h_pbtn.asm
3.Flowchart
SmiInitAtEarlyPost_FAR
core\src\smiload.asm
This procedure defines the entry point in the smi module
at early post. It will do the following operations,
1. Open SMRAM for writing
2. Clear all SMI status bits and enable SMI generation
3. Relocate all CPUs (BSP and APs)
4. Validate SMI table and get the count of handlers.
5. Call the Early Post Activate of each individual handler
6. Close SMRAM
SmiInitAtLatePost_FAR
core\src\smiload.asm
This procedure defines the entry point in the smi module
at late post. It will try to initialize and enable all
possible SMI sources.
call OpenSmram_FAR
; Open SMRAM for USE
call InitEachSmiHandler
call CloseSmram_FAR
; Close SMRAM after USE
3.2 Runtime
See AMIBIOS8_smi_module_20.pdf p.14
-------------------------------------------------------------------------
SMBIOS(DMI)
1. Flowchart
ProcessSMBIOSModule_far
core\em\smbios\smbios.asm
This routine uncompresses the DMI module and give control to it (if
present) to build the DMI data structure table and then copies the
DMI code and structures in the final runtime image.
smbios code, smbios data
1. DMI Code module is already uncompressed
2. Read DMI data from GPNV to temp segment (gs:temp_segment)
(current runtime image)
3. Read the DMI data from BIOS ROM (uncompress DMI data)
4. call InitSMBIOS_FAR
core\em\smbios\smbpost.asm
This routine initializes all SMBIOS data structures during POST.
1. Init. the SMBIOS Installation structure
2. init_smbios_data_structures
This routine initializes all SMBIOS data structures
during POST.
3. combine_rom_gpnv_dmi_data
bsp\em\smbios\smbport.asm
This routine combines the DMI data as read from
ROM and GPNV.
5.Copy the image to the F000 segment.
CopyImageToRuntimeArea_FAR
core\src\bioslib.asm
ProcessSMBIOSModuleLatePost_far
core\em\smbios\smbios.asm
This routine gets control during late POST is responsible for
updating the dynamic data in the structures.
-------------------------------------------------------------------------
ACPI
1.Data Sturcture
1.1 E820 - Memory information objects. core\src\ekdata.asm
RealMemInfo
e820_info_struc &h, 0009FC00h, RAM_OS&
EBDAMemInfo
e820_info_struc &0009FC00h, h, RAM_RES&
SystemBIOSMemInfo e820_info_struc &000E0000h, h, RAM_RES&
ExtendedMemInfo e820_info_struc &h, h, RAM_OS&
FirstHoleMemInfo e820_info_struc &h, h, RAM_DUMMY&
AboveFirstHoleMemInfo e820_info_struc &h, h, RAM_DUMMY&
e820_info_struc struc
start_addr
? 32-bit start address
size_bytes
? size in bytes
? memory type
e820_info_struc ends
;ram_os(01h)
memory type available to OS
;ram_res(02h)
memory type reserved by system and
must not be used by OS
;ram_acpi_data(03h)-
ACPI Reclaim data area
;ram_acpi_nvs(04h)-
ACPI NVS area
1.2 Type3 and Type4 memory is define in coreacpi.sdl
MEM_TYPE3_START equ
core\em\acpi\tblacpi.equ
MEM_TYPE3_SIZE equ
MKF_TYPE3_MEM_SIZE (define in coreacpi.sdl)
MEM_TYPE4_START equ
MEM_TYPE3_START + MEM_TYPE3_SIZE
MEM_TYPE4_SIZE equ
((MEM_TYPE3_SIZE + MEM_TYPE4_COMB_SIZE + 0FFFFh)
AND 0FFFF0000h) - MEM_TYPE3_SIZE
1.3 ACPI table description:
RSD PTR - Root System Description Pointer (System BIOS)
Point to RSDT
RSDT- Root System Description Table (3:ACPI Reclaim)
point to FACP
point to ...
FACP - Fixed ACPI Description Table (3:ACPI Reclaim)
point to FACS
point to DSDT
PM1x_EVT_BLK -- H/W
PM1x_CNT_BLK -- H/w
FACS - Firmware ACPI control Structure (4:ACPI NVS)
wake vector,global lock
DSDT - Differentiated System Description Table(3:ACPI Reclaim)
1.4 E820 Table
POST_CSEG:E820MemInfoObjectTbl
build\kernel.asm
2.ASL Code
2.1 DSDT.asl
1.Generate by ACPI.mak
2.Main ASL file to include all other ASL files
3.Sx State list
2.2 PCITREE.asl
build\pcitree.asl
1.Generate by AMISDL utility
2.PCI device,legacy device list file
3.Device routing information
4._GPE methods
5.Power button device
3.Flowchart
PrepareE820MemInfoObjects_FAR core\src\mem.asm
This routine updates the E820 memory info objects as per the
current system configuration.
PrepareACPIE820MemInfoObjects_FAR core\em\acpi\postacpi.asm
Includes ACPI Type 3 & 4 memory entries into e820 table
build_acpi_table_FAR,0008Dh
core\em\acpi\postacpi.asm
This routine uncompresses the ACPI module and give control to it (if
present) to build the ACPI tables and then copies them to the final
runtime location at the top of available System memory
This routine will only be called if ACPI support is enabled in BIOS
and ACPI Aware OS setup question is enabled in Setup.
Acpi_generate_tables_FAR
core\em\acpi\tblacpi.asm
Code to build tables, init pointers and checksum (porting
not required) Tables are copyied to memory Type 3 & 4 after
all fields are updated
PrepareE820Table_FAR
core\src\mem.asm
This routine adds all the E820 memory info objects from the
TDP table &E820MemInfoObjectTbl&. Here, we add all the memory
info objects in ascending order beased on the memory base
address value in each object.
save_acpi_context_FAR
core\em\s3acpi.asm
This routine saves the ACPI related system context to be used by in
S3 wakeup.
mov al, EQU_ACPI_STORE_CTXT
call GenerateSwSmi_FAR
AcpiSwSmiValues
build\kernel.asm
;EQU_ACPI_ENABLE
;EQU_ACPI_DISABLE
;EQU_ACPI_STORE_CTXT
AcpiSwSmiHandlers_FAR
build\kernel.asm
;AcpiEnableLink_FAR
;AcpiDisableLink_FAR
;StoreAcpiContext_S3
StoreAcpiContext_S3
build\kernel.asm
;Save system context to be restored on S3 resume path
call InitCpContext_ptr core\em\acpi\s3acpi.asm
;This routine initializes start pointer to save chipset
call Save_ChipsetContext_nvs csp\em\acpi\runacpin.asm
;This saves PCI chipset context in ExtendedCMOS memory
call SavePCIcontext_ram core\em\acpi\s3acpi.asm
;This routine stores PCI context scanning PCI_context_table
;register map to PCI_CONTEXT buffer.
call GetCpContextPtr
core\em\acpi\s3acpi.asm
;This routine returns current pointer within save chipset
;context buffer in Type4_NVS space
call SB_StorePciContext_ram csp\em\acpi\runacpin.asm
;This routine will save PCI context to the address
;returned by cs:pCpContext_ptr pointer. Pointer must be
;updated on exit from the routine
call SetCpContextPtr
core\em\acpi\s3acpi.asm
;This routine updates current pointer within save chipset
;context buffer in Type4_NVS space
call SaveMemIOcontext_ram core\em\acpi\s3acpi.asm
;This routine stores PCI Memory mapped IO context scanning
;PCI_context_table register map to PCI_CONTEXT buffer.
call SaveIOcontext_ram
core\em\acpi\s3acpi.asm
;This routine stores IO context scanning IO_context_table
;register map to IO_CONTEXT buffer.
call SaveSIOcontext_ram
core\em\acpi\s3acpi.asm
;This routine stores IO context scanning SIO_context_table
;register map to SIO_CONTEXT buffer.
call Update_RestoreAcpiContext_seg bsp\em\acpi\oemracpi.asm
;This routine will update the segment of RestoreAcpiContext_S3
;for restore system context on S3 resume path.
3.2 ACPI S3 Resume
CheckAndWakeupSystem
core\src\ub.asm
CHECK_POINT_INI 0D1h
Checks if the system is coming back from ACPI S3 or if it is
just a normal boot.
If system is waking up from ACPI S3,
control branches to wake-up path and does not come back here.
WakeupSystem
bbkernel.asm
csp\nbbb.asm
CHECK_POINT_INI 0DCh
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook must be ported to handle the following
tasks, to wake-up the system from ACPI-S3 state.
1. Enable SMRAM, if controlled NB.
2. Restore NB registers from CMOS.
3. Do any other NB specific initialization needed in wakeup
csp\sbbb.asm
CHECK_POINT_INI 0DDh
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook must be ported to handle the following
tasks, to wake-up the system from ACPI-S3 state.
1. Enable SMRAM, if controlled SB.
2. Restore SB registers from CMOS, if required.
3. Do any other SB specific programming needed in wakeup path.
OEM_Wakeup
bsp\oembb.asm
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook can be ported to handle any OEM specific
programming needed in wakeup path.
csp\cspbb.asm
CHECK_POINT_INI 0DEh
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook must be ported to handle the following
1. Enable SMRAM.
2. Restore chipset registers needed in resume path.
3. Do any kind of programming needed before giving control to
wakup routine in SMRAM area.
4. Finally, give control to wake-up routine in SMRAM area,
for waking-up the system.
;; Give control to wake-up routine in SMRAM area.
ax, MKF_SMRAMSEG SMRAM Seg.
DS = SMRAM Seg.
DWORD PTR ds:[0010h]
SMI_BSPENTRYSEG:[10h]
csp\em\smi\smientry.asm
; FixedEntryProc1 is used during S3 resume. Porting of this proc is
; necessary if s3 resume support has to be implemented.
OFFSET SMI_BSPCSEG:SMI_FixedEntryProc1_FAR
SMI_BSPCSEG
SMI_FixedEntryProc1_FAR
csp\em\smi\sbsmi.asm
Fixed Entry Point defined in SMI Code that can be used for
a known entry into SMI code.
FixedEntryProc1 is used to enable the F000 Shadow code
used during S3 resume. We need a fixed entry location in SMI
code that can be used to enable the F000 shadow ram and jump
to the fixed reset entry location (F000:FFF0) after enabling
the F000 region.
Following steps are done here,
1. Set DS to 0000h and stack to a valid location
2. Enable F000 Shadow region
3. Jump to F000:FFF0h
cpu_reset_vector
core\src\jmp.asm
CPU Reset Vector at F000:FFF0.
dw offset RUN_CSEG:reset_e05b
dw RUN_CSEG
jmp to F000:E05B
reset_e05b
core\src\jmp.asm
core\src\bios.asm
Entry point to the Runtime BIOS in F000 shadow RAM.
Control come here after CPU soft reset of if there is a jump
to the CPU_Reset_Vector.
From CPU_Reset_Vector (F000:FFF0)
there is a jump to F000:E05B, and from there controls comes
directly here for SHUTDOWN RESET SHUTDOWN PROCESSING
core\em\acpi\runacpi.asm
This routine can be used to implement ACPI S2/S3 resume.
If not S2/S3 wake up, just return control by JMP WAKE_UP_END
If S2/S3 wake up, initialize context, jmp to Wake Up vector.
call RestoreOemContext_FAR build\kernel.asm
call restore_acpi_context
call FreezeDrive_FAR
restore_acpi_context bsp\em\acpi\oemracpi.asm
dw offset SMI_BSPCSEG:RestoreAcpiContext_S3
RestoreAcpiContext_seg label word
dw 0 ; SMI_BSPCSEG
RestoreAcpiContext_S3
build\kernel.asm
call InitCpContext_ptr
core\em\acpi\s3acpi.asm
call init_timer_FAR
core\em\acpi\s3acpi.asm
call init_dma_FAR
core\em\acpi\s3acpi.asm
call init_pic_FAR
core\em\acpi\s3acpi.asm
call RestorePCIContext_ram core\em\acpi\s3acpi.asm
call GetCpContextPtr
core\em\acpi\s3acpi.asm
call SB_RestorePciContext_ram csp\em\acpi\runacpis.asm
call SetCpContextPtr
core\em\acpi\s3acpi.asm
call RestoreMemIOContext_ram core\em\acpi\s3acpi.asm
call RestoreIOContext_ram
core\em\acpi\s3acpi.asm
call RestoreSIOContext_ram core\em\acpi\s3acpi.asm
call EnableSciBit
core\em\acpi\runacpi.asm
call SB_ProgramACPIRegs
csp\em\acpi\h_acpi.asm
call OEM_RestoreAcpiContext_S3 bsp\em\acpi\oemracpi.asm
; Get Wakeup Vector Address from FACS
mov esi, cs:rsdt_ptr
add esi, FACS_TBL_OFFSET + 0CH
mov eax, dword ptr ds:[esi] ; esi = 32 bit pointer to FACS table fw_wake_vector field
mov ebx, eax
; Store 32 bit offset of Wakeup Vector
and eax, 000FFFF0h
; Mask segment-significant bits
shl eax, 12
; Place segment-significant bits in upper word of EAX
and ebx, 0000000Fh
; Mask offset-significant bits
mov ax, bx
; Place offset-significant bits in AX
Put the Wakeup Vector back to FACS in the Seg:Ofs format
mov dword ptr ds:[esi], eax
Jump to OS wakeup code
jmp dword ptr ds:[esi]
OS....OS...
-------------------------------------------------------------------------
AMI Debug
See Demo
-------------------------------------------------------------------------
OEMBoard
2. PROJECT
webmaster@bios</ 2,电擦除 EPROM 3,EEPROM 4,FLASH Memory BIOS 维修网站,提供 bios 相关服务,网址:www.bios</ 多功能编程器使用说明 ASD AE...最简单的方法就是吧主板BIOS放的编程器里选择备份_电脑基础知识_IT/计算机_专业资料。最简单的方法就是吧主板 BIOS 放的编程器里选择备份,选择存放。 麻烦点的就...USB_SPI_编程器最新主板25系列BIOS芯片介绍_互联网_IT/计算机_专业资料。USB_SPI_编程器最新主板 25 系列 BIOS 芯片介绍最近有好多网友询问,为什么我的主板上找不...2010款全功能BIOS编程器PCB6.0E操作说明_计算机软件及应用_IT/计算机_专业资料。今日推荐 89份文档 爆笑大撞脸 超爆笑笑话 有趣及爆笑图片汇集 绝对经典搞笑照片68...华硕主板编程器刷BIOS MAC地址无效的问题_计算机硬件及网络_IT/计算机_专业资料。对应华硕板P5G-MX、P5GC-MX等 近日修的几片华硕板 P5G-MX、 P5GC-MX 等, L2...主板BIOS修改终极大法_IT/计算机_专业资料。主板BIOS修改终极大法含BIOS编程如何换BIOS 如何DIY BIOS 种种非常详细 在老一代 DIY 玩家眼中,BIOS 是电脑入门的必修...操作 系统对硬盘、光驱、键盘、显示器等外围设备的管理,都是直接建立在 BIOS 系统中断服务 程序的基础上的, 它是 PC 系统中的软件与硬件之间的一个可编程接口。...EEPROM 由于 EPROM 操作的不便, 586 以后的主板上 BIOS ROM 芯片大部分都采用 EEPROM (Electrically Erasable Programmable ROM, 电可擦除可编程 ROM) 。 通过...汇编语言程序设计(第四版)第1~4章【课后答案】_理学_高等教育_教育专区。已经...ROM-BIOS 是计算机系统中用来提供最低级、最直接的硬件控 制的程序。 〔习题 ...本文是着重通过对动画程序的设计实现汇编语言程序设计。阐述动画汇编程序的设计 思路与方案,绘制程序流程图,运用 8086CPU 提供的指令、伪指令、宏指令及 DOS,BIOS ...
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精英G31T-M7刷BIOS
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QQ截图38.jpg (97.57 KB, 下载次数: 37)
17:06 上传
BIOS芯片应该是右上角的小的那芯片 那张标上面是写的是686&&AMIBIOS VX52&&5466
我要买什么样子的编程器刷 BIOS程序要去哪下呢
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那个貌似不是BOIS，是IO。真正的BOIS在你发的图右上角，上面有白漆的八脚芯片！！
楼主说得对,&
同意楼主: 5 &
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那是IO啊。兄弟。编程器一定要买好一点的。，
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蛋蛋网络/hx鹏仔 发表于
那是IO啊。兄弟。编程器一定要买好一点的。，
我知道是io啊 io上帖了bios型号才照进去的
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管红波 发表于
那个貌似不是BOIS，是IO。真正的BOIS在你发的图右上角，上面有白漆的八脚芯片！！
恩 这个我知道
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我也想知道,BIOS要怎么刷的吗
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西尔特500p
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我刚在深圳赛格买了一台西尔特500P，1250元，很好用，基本都可以刷的！
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这个芯片是25系列的编程器几乎都能刷写，不一定非得买上千元的，几百元的就足够了
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在插槽里八脚的那个就是
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头像被屏蔽
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多年硬件维修经验.资深数据恢复工程师
&&PCI插槽那里，一个八角的插件BIOS，可以撬下来刷。我们一般用希尔特的再买几个座子就可以刷了。然后BIOS根据版号下载！
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同意用 希尔特500p的说法&&我就是500p& & 台机 笔记本&&通杀超好用
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西特尔的编程器确实也是有点贵了，买个一般的也都能刷这种DIP封装的了。
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志成电脑维修 发表于
我刚在深圳赛格买了一台西尔特500P，1250元，很好用，基本都可以刷的！
有没有便宜点的那种推荐啊
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鸿鹄专业电脑 发表于
PCI插槽那里，一个八角的插件BIOS，可以撬下来刷。我们一般用希尔特的再买几个座子就可以刷了。然后BIOS根 ...
哪有的下能给个网站连接不
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war 发表于
有没有便宜点的那种推荐啊
还是买个差不点儿的吧，一步到位了，不然买个便宜的，以后有很多芯片都刷不了，还是要重新再买，西尔特500P这个性价比相当不错了，很给力！
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他们家在深圳赛格三楼有实体店的，我在深圳呆了一年，去过他们店里，都是正品行货可以放心购买，然后座子有好多种，常用的基本6种就可以了，这是他们的淘宝名字：wei623d
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现在的BIOS多是8脚的25系列，& &买个几十的CH341A编程器就可写好多的25芯片了 。
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是的，8脚多了
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张洪水 发表于
现在的BIOS多是8脚的25系列，& &买个几十的CH341A编程器就可写好多的25芯片了 。
好的 谢谢。
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AMIBIOS8 Architecture
BootBlock
1. ROM image --- ROMimage.doc
2. Everything start from here:
CPU Reset Ve
ctor at FFFFFFF0h
cpu_reset_vector
core\bbend.asm
ORG f000:fff0
3. CPU, Chipset Initialization
PutCPUInFLatMode
core\src\ub.asm
Places the CPU in Big Real Mode (Flat Mode).
This routine goes to FLAT protected mode and sets DS, ES
with 4GB limit starting at physical address
comes back to real mode with DS, ES limit set to 4GB.
4. Recovery support
ProgramNewRomImage_FAR
Token = &BOOT_BLOCK& &=& &1&
= &Programs new ROM image into the FLASH part.&
ProcessNewRomImage_FAR
Token = &BOOT_BLOCK& &=& &2&
= &Replaces the current ROM image in memory with the
new ROM image obtained from FLASH Recovery procedures.&
5. Decompress the main BIOS
CopyBBToRAMAndGiveControl
core\src\up.asm
This routine copies the BootBlock to RAM and transfers control
FFFFXXXX ---& 8000:xxxx
See the relative files:
1.build\init.map
2.build\bblock.cfg
3.build\init.loc
BBExecuteUCode_FAR
build\bbkernel.asm
FormRomImage_FAR
core\src\up.asm
Forms the ROM image in the buffer above 1MB
at memory location defined by the equate PTR_TO_ROM_IMAGE.
and copy ROM image to buffer
PTR_TO_ROM_IMAGE EQU 120000h ;1M:128K (core\src\cf.asm)
GiveControlToInterfaceModule_FAR core\src\up.asm
This routine finds the Interface module in the BIOS image
(in RAM) and copies to lower memory where it will reside
through POST.
Once the module is copied to lower memory,
control goes to Interface module to continue with POST.
Control never comes back to BootBlock code after this point.
call cs:Interface_Module_entry_point
Interface Module = uui.obj + uzdat.obj + uz.obj
decompress_main_BIOS_FAR
core\src\uui.asm
This routine decompresses the complete BIOS code and copies
all the BIOS segments to its final destination.
bbc_uncompress_ Uncompress BIOS module.
(umcompress to 2A0000h, for example)
call CopyBIOSSegs
Copies the different BIOS segments from the
SLAB module into their final destination in memory.
6. Check point D0-DA
7. Flowchart
BBkernel.asm
POST
Check point 03-00
1. Flowchart
Kernel.asm
====================================================
CORE eModule
Flash and GPNV
1.Any Flash Part datasheet
POSTINT09h
PMM (POST Memory Manager)
1.POST Memory Manager Specification
POST Error Management
DIM
ADM (AMI Display manager)
1.AMI Display Manager functional and API Definition
1.Information Technology AT Attachment with Packet Interface - 6
(ATA/ATAPI-6)
1.BIOS Boot Specification
2.AMIBIOS8 BIOS Boot Specification Developer's Reference
Silent Boot
Setup (Client/Server)
1.AMIBIOS Setup Script Processor(SSP) Specification
--------------------------------------------------------------------------
Add/Remove when Build BIOS
1.CPU Configuration Module(CCM) Specification
Chipset
NB
SB
1.SMI Module Technical Reference Guide
1.System Management BIOS (SMBIOS) reference specification
1. Advanced Configuration and Power Interface Specification
=========================================================
CORE Feature
Flash and GPNV
1.Flash parts Classified:
Flash part size - 1MByte, 512KByte, 256KByte
Flash Interface type - Standard(ISA), LPC, FWH
BootBlock size - 64KByte, 16KByte
All parameters are selected at build time by FLASH.sdl
2.Memory Map
2.1 Device Memory Map
2.2 Boot-Configuration and System Memory Map
Example:SST49LF004.pdf
3.GPNV - General Purpose Non-Volatile
Introduced in SMBIOS specification
Will only use up to 16KByte - OS Limitation
Used by: ESCD,Event log,SMBIOS data...
Location and Size
Flash part size:512KByte
-- Flash.sdl
BootBlock size - 64KByte
NVRAM_SIZE:64KByte
-- Flash.sdl(the block in which NVRAM reside)
MKF_MEMORY_MAPPED_GPNV_SIZE:16KB
-- oemcfg.asm
GPNV_ESCD_DATA_LENGTH:1000h(4K)
-- oem.sdl
GPNV_SMBIOS_DATA_LENGTH:800h(2K)
-- oem.sdl
GPNV_EVENT_LOG_DATA_LENGTH:400h(1k) -- oem.sdl
4.Data Structure
GPNV_CONFIG_STRUC struc
dw ? ; Data ID
dw ? ; GPNV Handle#
dw ? ; Size in bytes of the area
wStartOffsetInGPNV dw ? ; Start Offset of the area in GPNV
bAttribute
db ? ; Attribute (see below for details)
GPNV_CONFIG_STRUC ends
Example: ESCD Data
{ESCD_DATA_ID,0000h,MKF_GPNV_ESCD_DATA_LENGTH,GPNV_ESCD_DATA_START,00h}
GPNV_DATAID_HEADER_STRUC struc
dw 1 dup(?); Data ID of the area
dw 1 dup(?); GPNV handle# (0-based) of the area
dw 1 dup(?); Total size in bytes of the area including this header
wStartOffsetInGPNV dw 1 dup(?); Start Offset of the area in GPNV
wFreeLocation
dw 1 dup(?); Offset (relative to the start of area) of first free byte in the area
; 0000h/FFFFh -& area is full
; this value can never be less than 10h which is the header length
; i.e. in case the area is empty, the value will be 10h
bAttribute
db 1 dup(?); Attribute (see below for details)
db 5 dup(?); Reserved for future use
GPNV_DATAID_HEADER_STRUC ends
5.Flowchart:
DetectFlashAndNVRAM
core\src\gpnv.asm
InitGPNVArea_FAR
core\src\gpnv.asm
InitializeGPNVStructures
Fills in the handle number and start offset for
all the GPNV data id structures.
1.Read the whole GPNV data to the supplied buffer
2.According to the gpnv_dataid_table modify the
GPNV_DATAID_HEADER_STRUC
3.Write the whole GPNV data from the supplied buffer back to the
--------------------------------------------------------------------------
POSTINT09h
1.Traps the INT09h vector, so that the POST INT09h handler gets
control for IRQ1 durig POST.
Flowchart:
CheckInstallPOSTINT09hHandler_FAR
core\src\i09hdrv.asm
Check POST INT09h Installed?
Check any Input Device?
Save Original INT09h Vector
(CS:dPreINT09hVector)
Trap INT09h to POST INT09h Handler
(POST_CSEG:POSTINT09hHandler)
POSTINT09hHandler
core\src\i09hdrv.asm
ProcessBIOSKeys_FAR
core\src\in.asm
ProcessUserInput_FAR
build\kernel.asm
1.Process BIOS Keys
2.Process User Input optional features
Example:ProcessUserInputForSilentBoot_FAR
core\src\silent.asm
Go to Original INT09H handler
(Not a BIOS Key)
BIOS Keys: POST_DSEG:KernelKeyTbl
core\src\ekdata.asm
stBIOSKey &MKF_CMOS_SETUP_KEY,CMOS_SETUP_REQ_BIT&
2.Puts back the original INT09h vector that was trapped while
in POST INT09h installation.
UninstallPOSTINT09hHandler_FAR
core\src\i09hdrv.asm
--------------------------------------------------------------------------
PMM
1.POST Memory Manager
2.Available only during POST
3.PMM model - Client and Server
Server - PMM Services (a set of function calls)
Client - Internal BIOS code and Option ROMS
4.Data Structure
4.1 PMM Installation Structure definition. core\include\pmm.equ
RUN_CSEG:pmm_installation_structure
PMM_STRUC struc
bSignature db 4 dup(?) ; signature '$PMM'
bRevision db 1 dup(?) ; structure revision
bLength db 1 dup(?) ; structure length in bytes
bChecksum db 1 dup(?) ; checksum
dPtrPMMFunction dd 1 dup(?) ; pointer to PMM function calls
bReserved db 5 dup(?) ; reserved for future use
PMM_STRUC ends
4.2 PMM Data structures (Memory Allocation Entries):
Keep track of the memory that has already been allocated.
PMM_DSEG:PMMDataTable - BYTE Array
;MEMORY_ALLOCATION_STRUC
; MEMORY_ALLOCATION_HEADER_STRUC {}
; MEMORY_ALLOCATION_ENTRY_STRUC {}
; MEMORY_ALLOCATION_ENTRY_STRUC {}
; | | | | |
; | | | | |
; MEMORY_ALLOCATION_ENTRY_STRUC {}
;MEMORY_ALLOCATION_STRUC
4.3 Memory allocation entry structure
MEMORY_ALLOCATION_ENTRY_STRUC
dStartAddress
? start address of the memory block
? size of the memory block in bytes
? associated handle
FFFFFFFF -& anonymous handle
4 dup(?); reserved for future use
MEMORY_ALLOCATION_ENTRY_STRUC
5.Flowchart:
init_pmm_far
core\src\pmm.asm
Add ROM image memory entry (compress ROM)
Add BIG BIOS memroy entry
(uncompress ROM)
Init PMM installation structure
Fill &$PMM& Signature
Fill PMM entry (pointer to PMM function calls)
Update checksum
6.PMM entry
Entry point for PMM in PMM_CSEG.
PMM_CSEG:pmm_entry
core\src\pmm.asm
pmm_function_table LABEL BYTE
offset PMM_CSEG:pmm_func_00 00..PMM Allocate.
offset PMM_CSEG:pmm_func_01 01..PMM Find.
offset PMM_CSEG:pmm_func_02 02..PMM Deallocate.
offset PMM_CSEG:pmm_func_ Invalid PMM function.
pmm_function_table_end
7.Usage example(Client):
allocate_memory
core\src\ui.asm
push 0000h
; PMM allocate function number.
call dword ptr gs:(PMM_STRUC ptr pmm_installation_structure).dPtrPMMFunction
add sp, 12
--------------------------------------------------------------------------
POST Error Management
1.Presents all posted BIOS errors to user and gets the user
response for error recovery.
2.Data Structure
2.1 All POST Error table are defined in BIOSErrorTbl(kernel.asm)
and customer can use Elink to append their own to it.
POST_CSEG:BIOSErrorTbl
build\kernel.asm
OEMErrorTbl
bsp\oemcfg.asm
KernelErrorTbl
core\src\ekdata.asm
CPUErrorTable
bsp\cpu\cpuextfn.asm
USBErrorTable
bsp\em\usb\usboem.asm
KernelErrorTbl
core\src\ekdata.asm
stBIOSError & NO_PS2_MOUSE_ERR, MKF_ATTRIB_NO_PS2_MOUSE_ERR,
0FFFFh,_str$_PS2_Mouse_err &
stBIOSError STRUCT
core\include\mbiosequ.equ
wErrorCode
DW 00000h;Bit[0-7] - Error number.
Bit[8-15] - Module ID.
wErrorAttrib
DW 00000h;Bit[0-3] - Error type.
ERROR_TYPE_MASK EQU 0000Fh
ET_NOT_AN_ERR EQU 00000h
ET_INFORMAL
EQU 00001h
ET_WARNING
EQU 00002h
ET_GENERAL
EQU 00003h
ET_CMOS_RELATED EQU 00004h
EQU 00005h
EQU 00006h ;Reserved for CORE
EQU 00007Furure use.
EQU 00008h
; Types 08-0Fh : can be used bye OEMs
MAPS_TO_SMBIOS_ERR_BIT EQU BIT_4 ;Bit[4]-Set for SMBIOS mapped errs.
Bit[5-15] - RESERVED.
wDisplayErrorInfoProcOffset DW 00h; = 0FFFFh for string token.
wDisplayErrorInfoProcSeg
DW 00h; = Token number for string token.
stBIOSError ENDS
2.2.Table which will be filled during BIOS POST with all Posted
BIOS errors.
POST_DSEG:PostedBIOSErrorTbl
bsp\oemcfg.asm
2.3 Hold the error counter
fs:wPostedBIOSErrorCounter
core\src\ekdata.asm
3.Flowchart:
CP 03h - CP 85h
Post BIOS error to PostedBIOSErrorTbl
Routine:PostBIOSError_FAR
(EKPostBIOSError_FAR) core\src\errmgr.asm
mov ax, NO_PS2_MOUSE_ERR
core\src\kbc.asm
call PostBIOSError_FAR
ProcessPOSTErrors_FAR
core\src\errmgr.asm
Check PostedBIOSErrorTbl and BIOSErrorTbl
Any error posted? Which error?
Display error message(string) and
Get user response for errors.
--------------------------------------------------------------------------
DIM
1. Device Initialization Manager
1.1.Iinitialize all device types including system board devices.
1.2.The DIM contains a list of Device Initializer modules, one of
which handles a single device type (ISA, EISA, PnP ISA, PCI, etc.).
2. Data Structure
2.1 Resource Map Entry Structure
resmap_entry RESMAP_MAX_ENTRIES dup (&&)
resmap_entry
core\include\dim.equ
Resource Map Entry Structure
------------------------------------------------------------------------------
resmap_entry struc
rm_res_type db ? ;RESTYPE_IRQ, RESTYPE_DMA, etc.
rm_res_flags db ? ;RESFLAG_SHARE, RESFLAG_STATIC, etc.
rm_resval_irq resval_irq
rm_resval_dma resval_dma
rm_resval_port resval_port &&
rm_resval_mem resval_mem
rm_owner_sys owner_sys
rm_owner_isa owner_isa
rm_owner_eisa owner_eisa &&
rm_owner_pnp owner_pnp
rm_owner_pci owner_pci
reserved_1 db ?
resmap_entry ends
resval_irq struc
rv_irq_flags db ?
rv_irq_level db ? ;IRQ level number
rv_irq_rsvd db 15 dup (?)
resval_irq ends
owner_pci struc
own_pci_sig db ? ;Set to OWNTYPE_PCI
own_pci_bus db ? ;Bus number of PCI device
own_pci_devfunc db ? ;Dev/Func number of PCI device
own_pci_rsvd db ?
own_pci_vendid dw ? ;Vendor ID of PCI device
own_pci_devid dw ? ;Device ID of PCI device
own_pci_rsvd2 dd ?
owner_pci ends
See resmap1.bmp, resmap11_d.bmp
2.2 DIM_DSEG:NVRamWork
core\src\dimdata.asm
3. Flowchart
See amibios8 dim.ppt
DIMDeviceInitAtEarlyPOST_FAR
core\src\dimif.asm
bus_device_init_1
mov ax, 0000h
;DIM Func 0 - Reset, Detect, Disable
call invoke_dim_far
core\src\dim.asm
1. Calls the Resource Manager to initialize the resource map.
2. Copies NVRam contents into the NVRam workspace (NVRamWork).
DIM_DSEG:NVRamWork
core\src\dimdata.asm
init_nvram_workspace
core\src\dim.asm
3. Calls all Device Initializers.
di_sys_func_0
core\src\di-sys.asm
1.If the NVRam workspace does not contain any device nodes
then copy the device nodes and their default settings
from ROM into the NVRam workspace.
2.Call the hook function to disable any configurable
onboard devices and their corresponding device nodes.
PeripheralTableStart(core\io.asm) ---& build\io.inc
di_isa_func_0
core\src\di-isa.asm
di_pnp_func_0
core\src\di-pnp.asm
1.PnP Isolation Algorithm is done and the two variables
nvrhd_pnp_max_csn and nvrhd_pnp_read_port are updated
in the NVRam workspace.
2.All PnP ISA devices are disabled.
di_pci_func_0
core\src\di-pci.asm
1.Init PCIPeriDevTable: Search all device node(build\io.inc)
that is set to &PTFLAG_INVISIBLE_NODE& (Node is invisible
after boot) then put it in the PCIPeriDevTable.
2.Scan for PCI-PCI bridges, assign bus
numbers, sets MaxPCIBusNumber
3.Prepare BUS# translation table.
build\busnumxlat.inc
Update BUS#s in IRQ routing tbl.
4.Disable all the pci devices except the device is protected
(chipset) or list in the PCIPeriDevTable.
mov ax, 0100h
;DIM Func 1 - Static device init
call invoke_dim_far
di_pci_func_1
core\src\di-pci.asm
1.Get resources needed by each PCI bus
2.Configure any non-compliant PCI devices
mov ax, 0200h
;DIM Func 2 - Boot output device init
call invoke_dim_far
All device initializers are called until one of
them finds a device matching the boot output device settings
bus_device_init_2
mov ax, 0300h
;DIM Func 3 - Boot input device init
call invoke_dim_far
mov ax, 0400h
;DIM Func 4 - IPL device init
call invoke_dim_far
mov ax, 0500h
;DIM Func 5 - General device init
call invoke_dim_far
--------------------------------------------------------------------------
ADM
1.AMI Display Manager
2.A stand-alone binary module
3.Purpose: Handle screen output (256 color graphics/normal text)
4.Modules Overview
-- see ADM.pdf p.11
5.Function List -- see ADM.pdf p.3
6.Flowchart:
InitADMDriver_FAR
core\src\admdrv.asm
Allocate memory for ADM module and uncompress it there.
Give control to ADM module for initialization.
If ADM_FORCE_TEXT_MODE_BIT in wADMFlags is set ADM will be
forced in text mode.
Initialize language and font modules for ADM.
Activate ADM module.
fs:dADMFarEntryPADM far entry. core\include\admcore.equ
See ADM.pdf p.72
--------------------------------------------------------------------------
IDE - Integrated Drive Electronics
ATA - Advanced Technology Attachment
ATAPI - ATA Packet Interface
1.Data Structure
1.1 PnP ATA Data
PnP_ATA_Data struc
core\include\int13pnp.equ
PnPHeader PnP_Header && ;option rom header
FDDheaders FDDUSB_Exp_Header FDD_Header_count dup (&&)
;floppy headers
ATAheaders ATA_Exp_Header ATA_Header_count dup (&&)
;IDE headers
USBheaders FDDUSB_Exp_Header USB_Header_count dup (&&)
;usb headers
PnP_ATA_Data ends
1.2 channel_details_data
core\src\cf.asm
Runtime Data used for Boot device related information.This
is an array of CHANNEL_DETAILS_STRUC structures and holds
information for 4 IDE controllers.
Example:ata_1controller LABEL BYTE
CHANNEL_DETAILS_STRUC {01F0h, 03F6h,
0FC00h, 0EF06h, 0Eh, 00F9h}
CHANNEL_DETAILS_STRUC
wBasePortAddress
? ; Base Port Address
wControlPortAddress
? ; Control Port Address
wBusMasterPortAddress
? ; Bus Master Port Address
? ; ptr to IRQ ISR
? ; IRQ Value
wBusDeviceFunction
? ; Bus#, Device#, Function#
CHANNEL_DETAILS_STRUC
1.3 GS:ATAPI_INFO - Bit-0 - Primary
Master Device Info
Bit-1 - Primary
Device Info
Bit-2 - Secondary Master Device Info
Bit-3 - Secondary Slave
Device Info
Bit-4 - 3rd Channel Master Device Info
Bit-5 - 3rd Channel Slave Device Info
Bit-6 - 4th Channel Master Device Info
Bit-7 - 4th Channel Slave Device Info
0 - No ATAPI Device detected
1 - ATAPI detected
2. Flowchart:
CP 75h
InitPnPATAData_FAR
core\src\int13pe.asm
This procedure initializes the PnP ATA Data structure before
DIM for BBS and i13 device initialization is invoked.
This structure will be used (seen) as an option rom for dim
BBS/i13 drive initialization and will also be used to store
auto-detect data for each IDE drive.
1.Init. the PnP_ATA_Data data structure.
2.Build the far ptr to init_int13_far
(i13 PnP option now contains callf int13_module:bInit
at offset 3)
init_ata_channel_info_FAR
core\src\int13pe.asm
This routine initializes the information about ATA channel
details in runtime segment. this routine is called after ATA
controllers are assigned the resources.
ResetIDEControllers_FAR
core\src\int13pe.asm
This routine resets all the available IDE controllers.
check_presence_of_atapi_devices_FAR core\src\int13pe.asm
This routine checks for presence of ATAPI devices on the
This routine only identifies ATAPI devices but not device
type i.e. CDROM, FLOPTICAL, TAPE, etc.
Aquiredrivedata_FAR
core\src\auto.asm
This routine runs auto detection for each IDE port in the
system. Resulting data is stored inside a PnP expansion
header for each drive, for later access by
find_ata_atapi_device or by int13 init code (now invoked as
an option rom init from dim function 8).
This routine also derives the product string from the Intel
little endian rep insw result and stores it in a product
string field of the expansion header in asciiz format.
auto_hd_type
core\src\auto.asm
This routine detects IDE devices.
init_int13_far
core\src\int13pe.asm
This routine will be invoked When the BBS initialization routine
InitBAIDOptROM_FAR is invoked.
core\src\bbs0.inc
call init_ata_atapi_data_ Initialize ATA/ATAPI data area
call floppy_disk_setup ;Initialize FDD
call physically_find
;Set up 40:10 based on setup questions
call hard_disk_setup
;Initialize ATA/ATAPI devices
call Build_i13_PnP_Struc ;Fills in the PnP/BBS expansion header
;structure of PnP_ATA_Data
--------------------------------------------------------------------------
BBS
1.BIOS Boot Specification
2.Purpose:
2.1.Identify all IPL(Initial Program Loader) devices in the system.
2.2.Prioritize them in the orer that the user selects.
2.3.Sequentially go through each device and attempt to boot.
3.Data Structure
DimVectorMap: sequence of drive letters
EBDVectorMap: copy of DimVectorMap
BBS_Vector0: the vector table begins at this label in BBSVT.ASM
VDLs: sequence of vector DL values that will be used to invoke the i13 handlers
IPLDTableEntry: table of all IPL devices
core\include\bbs.dat
(ipld_table_entry
core\include\bbs.equ)
See IPLDTableEntry.bmp
ipld_table_entry struc
;0/1/2/3/4 = invalid/removable/hdd/cdrom/bev
;0/1/2/3 = invalid/hdd/fdd/bev
VectorIndex db ?
;Holds index into i13VectorMap
;Device type,see Values for owner_???.own_???_sig
ClassCode dw ?
;High byte is B low byte is sub class
ClassType db ?
;class type, see Class type equ
;handle by which i13 handler will recognize
;Device ID
;Vender ID
;offset of BEV within Option ROM Exp Header
;offset of BCV within Option ROM Exp Header
;option rom segment
;BEV segment
PortAddr dw ?
;IDE port addr
PnPRetAX dw ?
;or PnP ret value in AX
;or Resmap addr of device
MastOrSlave db ?
;IDE master/slave info
;IDE/USB for BAIDs
;PCI Bus or CSN for PnP ISA
;PCI DevFunc
DataPortAddr dw ?
;Data port address PNP ISA
BaidType db ?
;Type if BAID
;Dev status for RT functions
;Ptr to dev's menu if it is in sub menu
DevString db 32 dup (?)
;Holds device name. (Only the first 32 chars of that string)
ipld_table_entry ends
IPLPriorityEntry: boot device priority table
See IPLPriorityentry.bmp, HDPriorityEntry.bmp, RDPriorityEntry.bmp
bbs_index_table
db ? ;Holds cmos value (order of execution) for current entry
IPLDTIndex
db ? ;Holds boot order for this device
dw ? ;Holds chksum of devstring
bbs_index_table
HDPriorityEntry: hard drive priority table
RDPriorityEntry: removable device priority table
CDPriorityEntry: ATAPI CDROM priority table
PnP ATA Data Structure: PnP &option ROM& for BAIDs
4.Flowchart
CP 78h
BBSInit_FAR
core\src\bbs0.inc
Sets the BBSConfig variable:
GetBBSConfigFromBuild ; Establish config from BIOS parameters
GetBBSConfigFromCMOS ; Get configuration from CMOS and make flags
OEMGetBBSConfig_FAR ; allow OEM hook to have final
Sets the BBSBootOrder variable:
BBSBootOrder &-- MKF_BBS_IPL_SETUP_DEFAULTS
;Establish from BIOS parameter
GetBBSBootOrderFromCMOS ; allow cmos to overide
OemGetIPLDefaults_FAR ; allow OEM hook to have final
InitBAIDOptROM_FAR
core\src\bbs0.inc
This step invokes the upper level ROM initialization routine
search_resmap_dev_type to initialize the BAID option ROM.
search_ResMap_dev_type
core\src\bbs1.inc
This function Scans the NVRam workspace for IPL candidate
devices of particular kind. For each device found, its
esential info will be stored in IPLDT.
InitPCIOptROMs_FAR
core\src\bbs0.inc
This step invokes the ROM initialization routine
search_resmap_dev_type twice. The first invocation is for BBS
compliant PCI ROMs, and the second is to initialize non-BBS
compliant PCI ROMs.
InitISAOptROMs_FAR
core\src\bbs0.inc
This step invokes the upper level ROM initialization routine
search_resmap_dev_type twice for ISA option ROMs. The first
invocation is for BBS compliant ROMs and the second is to
initialize non-BBS compliant ROMs.
InitISAPnPOptROMs_FAR
core\src\bbs0.inc
As with the previous steps, search_resmap_dev_type twice for
PnP ISA option ROMs.
AddStaticIPLDeviceObjectsToBBS_FAR core\src\bbs0.inc
This routine copies entries from the StaticIplDeviceObjectTbl
structure to BBS's IPLDTableEntry structure.
StaticIplDeviceObjectTbl may be used to hardcode IPL devices
if required.
BBSBuildTables_FAR
core\src\bbs0.inc
At this point, the IPLDTableEntry structure contains entries
for all IPL devices in the system. On entry into this step,
CompareSysConfig is called to determine whether or not system
configuration of setup question values have changed since last
boot. This information will be used later in this step when
priority settings are established for each device.Next, the
subordinate HDPriorityEntry, RDPriorityEntry, CDPriorityEntry
and IPLPriorityEntry tables are derived from the IPLDTableEntry.
The order in which these tables are built is determined by the
default boot order as stored in BBSBootOrder. The routines
build_HDD_table, build_RMD_table, and build_CD_table are called
to build their respective tables. After each routine builds the
table, it calls the main CMOS routine NVCMOSInit to determine boot
priorities for the devices. NVCMOSInit determines how to establish
CMOS priorities based on whether or not system configuration or setup
question values have changed since last boot. Finally,
init_IPL_priorities is called which in turn invokes NVCMOSInit to
establish boot priority settings for the main IPLPriorityEntry table.
BBSConnectDrives_FAR
core\src\bbs0.inc
This step calls the routines dim_func_HD, dim_func_RMD and
dim_func_CDROM. These routines invoke the BCVs and build the
vector table.
BBSFinale_FAR
core\src\bbs0.inc
This finale main step prepares the system for int13 functionality
by preparing the EBDVectorMap. The $BBS runtime structure is also
completed at this point.
CP ABh
BBSBeforeI19_FAR
core\src\bbs2.asm
This routine displays popup menu if hotkey has been
It also sets up for network boot if THAT hotkey
has been pressed.
CMOS boot_first device is also checked (this may have been
set by bbs pnp runtime function 66). Any resulting boot_first
device is then copied to BDA:boot_first. Note that popup menu
has precedence and will override cmos first_boot if user make
a selection. Finally, cmos boot_first is reset to OFF if it
has been set.
BDA:boot_first
--------------------------------------------------------------------------
Silent Boot
1.Small Logo(BIOS Logo), OEM Logo(Silent Logo)
2.Display Logo eModule
2.1.Integrated all display decoder - JPG, BMP, PCX, Legacy format.
= &SMALL_LOGO_FILENAME&
Filename of the Logo to be displayed during booting on the top of
the screen (just a small strip)
= &OEM_LOGO_FILENAME&
Specify the filename for full screen logo to be displayed when
silent boot is enabled.
3.Flowchart
InitBIOSLogoModule_FAR
core\src\out.asm
1. Uncompress the BIOS logo module
2. Updates &dBIOSLogoAddr& to the address of
uncompressed BIOS logo module.
fs:dBIOSLogoAddr
; ptr to BIOS logo.
InitSilentLogoModule_FAR
core\src\silent.asm
1. Uncompress the Silent logo module
2. Updates &dSilentLogoAddr& to the address of
uncompressed Silent logo module.
fs:dSilentLogoAddr
; Addr of Silent logo.
SetInitialDisplayMode_FAR
core\src\silent.asm
Sets the initial display to OEM or BIOS mode as selected by
the user from CMOS setup.
call ChangeDisplayModeToOEM_FAR ; Put display in OEM mode.
call ChangeDisplayModeToBIOS_FAR ; To force BIOS display mode.
--------------------------------------------------------------------------
Setup (Client/Server)
1.Setup Client - Setup.bin
2.Setup Server - Setup Data(SSP, ASD, Control/External function)
Nvram manager code
3.Flowchart
CP 87h
ProcessCMOSSetupRequest_FAR
core\src\cmos.asm
Processes the user request for executing CMOS setup. For any
reason, if CMOS setup execution is not possible, default
values (Failsafe values, if the CMOS is bad and Optimal
values if the CMOS is good) will be loaded into CMOS.
; Run the CMOS setup program.
call ExecuteCmosSetup_FAR core\src\postmian.asm
Before invoke the setup client,
Setup Server has to Pass the:
1.Setup data ptr to Client.
SETSVR_CSEG:SetupDataMasterPointerTable
build\setupdb.asm
2.PMM entry ptr to Client.
PMM_CSEG:pmm_entry
3.ADM entry ptr to Client.
fs:dADMFarEntryPtr
4.NVRAM mgr ptr to Client.
sdsm_entry_rm
core\src\sdsmgr.asm
call cmos_setup_FAR
core\src\sdsvr.asm
gs:dword ptr _setup_ invoke setup client
4.Setup Data
Example:bsp\setup\csp.ssp
bsp\setup\nb.ssp
Example:bsp\setup\nb.asd
4.3 Control/External function
========================================================================
Add/Remove when Build BIOS
1.CCM (CPU Configuration Module)
2.1 Is a Set of self-contained routines and functions
2.1 Purpose: Initialization and configuration of the systems CPU(s).
2.Function List -- see CCM.pdf
3.Flowchart
See cpuflow.txt
-------------------------------------------------------------------------
SIO
1.Super I/O module
2.IO CORE --& ASM file, ASL file
2.1 ASM file - Program IO register, create Device Node for PNP OS
2.2 ASL file - For ACPI OS
3.Example1: see core\src\io\win627h\rcoma.asm
Example2: see core\em\acpi\uart1.asl
bsp\io\win627h\io.asl
4.Flowchart
4.1 At the build time
IODEVICE defined in the SDL file will be included in the build\io.inc
= &SerialPortA&
= &RCOMA.ASM&
= &Uart1.ASL&
ASLdeviceName
Token = &WIN627HF& &=& &1&
di_sys_func_0
core\src\di-sys.asm
call peripheral_register_Init/disable peripheral chip
ProgramPeripheralParameters_FAR
core\src\postmain.asm
call program_peripheral_setup_parameters_far core\src\rt.asm
4.3 Runtime
All PNP runtime function will be invoke via the rt_pnp_entry
See the &Plug and Play Run Time Function Table&
rt_pnp_inst_check_start
core\src\flsnvrg.asm
Plug and Play Installation Check.
rt_pnp_entry
core\src\rt.asm
-------------------------------------------------------------------------
Chipset
NB
SB
-------------------------------------------------------------------------
SMI
1.SMARM Organization
See AMIBIOS8_smi_module_20.pdf p.7
2.Data Structure
2.1 SMI Table
Handler1 Structure
Handler2 Structure
Handler3 Structure
Default handler Sturcture
2.2 SMI Entry Structure
SMI_HEADER STRUCT
SMI_Signature
'$SMI'
Handler_ID
ACTIVATE_CODE
IDENTIFY_CODE
HANDLER_CODE
SMI_HEADER ENDS
Exapmle:csp\em\smi\h_pbtn.asm
3.Flowchart
SmiInitAtEarlyPost_FAR
core\src\smiload.asm
This procedure defines the entry point in the smi module
at early post. It will do the following operations,
1. Open SMRAM for writing
2. Clear all SMI status bits and enable SMI generation
3. Relocate all CPUs (BSP and APs)
4. Validate SMI table and get the count of handlers.
5. Call the Early Post Activate of each individual handler
6. Close SMRAM
SmiInitAtLatePost_FAR
core\src\smiload.asm
This procedure defines the entry point in the smi module
at late post. It will try to initialize and enable all
possible SMI sources.
call OpenSmram_FAR
; Open SMRAM for USE
call InitEachSmiHandler
call CloseSmram_FAR
; Close SMRAM after USE
3.2 Runtime
See AMIBIOS8_smi_module_20.pdf p.14
-------------------------------------------------------------------------
SMBIOS(DMI)
1. Flowchart
ProcessSMBIOSModule_far
core\em\smbios\smbios.asm
This routine uncompresses the DMI module and give control to it (if
present) to build the DMI data structure table and then copies the
DMI code and structures in the final runtime image.
smbios code, smbios data
1. DMI Code module is already uncompressed
2. Read DMI data from GPNV to temp segment (gs:temp_segment)
(current runtime image)
3. Read the DMI data from BIOS ROM (uncompress DMI data)
4. call InitSMBIOS_FAR
core\em\smbios\smbpost.asm
This routine initializes all SMBIOS data structures during POST.
1. Init. the SMBIOS Installation structure
2. init_smbios_data_structures
This routine initializes all SMBIOS data structures
during POST.
3. combine_rom_gpnv_dmi_data
bsp\em\smbios\smbport.asm
This routine combines the DMI data as read from
ROM and GPNV.
5.Copy the image to the F000 segment.
CopyImageToRuntimeArea_FAR
core\src\bioslib.asm
ProcessSMBIOSModuleLatePost_far
core\em\smbios\smbios.asm
This routine gets control during late POST is responsible for
updating the dynamic data in the structures.
-------------------------------------------------------------------------
ACPI
1.Data Sturcture
1.1 E820 - Memory information objects. core\src\ekdata.asm
RealMemInfo
e820_info_struc &h, 0009FC00h, RAM_OS&
EBDAMemInfo
e820_info_struc &0009FC00h, h, RAM_RES&
SystemBIOSMemInfo e820_info_struc &000E0000h, h, RAM_RES&
ExtendedMemInfo e820_info_struc &h, h, RAM_OS&
FirstHoleMemInfo e820_info_struc &h, h, RAM_DUMMY&
AboveFirstHoleMemInfo e820_info_struc &h, h, RAM_DUMMY&
e820_info_struc struc
start_addr
? 32-bit start address
size_bytes
? size in bytes
? memory type
e820_info_struc ends
;ram_os(01h)
memory type available to OS
;ram_res(02h)
memory type reserved by system and
must not be used by OS
;ram_acpi_data(03h)-
ACPI Reclaim data area
;ram_acpi_nvs(04h)-
ACPI NVS area
1.2 Type3 and Type4 memory is define in coreacpi.sdl
MEM_TYPE3_START equ
core\em\acpi\tblacpi.equ
MEM_TYPE3_SIZE equ
MKF_TYPE3_MEM_SIZE (define in coreacpi.sdl)
MEM_TYPE4_START equ
MEM_TYPE3_START + MEM_TYPE3_SIZE
MEM_TYPE4_SIZE equ
((MEM_TYPE3_SIZE + MEM_TYPE4_COMB_SIZE + 0FFFFh)
AND 0FFFF0000h) - MEM_TYPE3_SIZE
1.3 ACPI table description:
RSD PTR - Root System Description Pointer (System BIOS)
Point to RSDT
RSDT- Root System Description Table (3:ACPI Reclaim)
point to FACP
point to ...
FACP - Fixed ACPI Description Table (3:ACPI Reclaim)
point to FACS
point to DSDT
PM1x_EVT_BLK -- H/W
PM1x_CNT_BLK -- H/w
FACS - Firmware ACPI control Structure (4:ACPI NVS)
wake vector,global lock
DSDT - Differentiated System Description Table(3:ACPI Reclaim)
1.4 E820 Table
POST_CSEG:E820MemInfoObjectTbl
build\kernel.asm
2.ASL Code
2.1 DSDT.asl
1.Generate by ACPI.mak
2.Main ASL file to include all other ASL files
3.Sx State list
2.2 PCITREE.asl
build\pcitree.asl
1.Generate by AMISDL utility
2.PCI device,legacy device list file
3.Device routing information
4._GPE methods
5.Power button device
3.Flowchart
PrepareE820MemInfoObjects_FAR core\src\mem.asm
This routine updates the E820 memory info objects as per the
current system configuration.
PrepareACPIE820MemInfoObjects_FAR core\em\acpi\postacpi.asm
Includes ACPI Type 3 & 4 memory entries into e820 table
build_acpi_table_FAR,0008Dh
core\em\acpi\postacpi.asm
This routine uncompresses the ACPI module and give control to it (if
present) to build the ACPI tables and then copies them to the final
runtime location at the top of available System memory
This routine will only be called if ACPI support is enabled in BIOS
and ACPI Aware OS setup question is enabled in Setup.
Acpi_generate_tables_FAR
core\em\acpi\tblacpi.asm
Code to build tables, init pointers and checksum (porting
not required) Tables are copyied to memory Type 3 & 4 after
all fields are updated
PrepareE820Table_FAR
core\src\mem.asm
This routine adds all the E820 memory info objects from the
TDP table &E820MemInfoObjectTbl&. Here, we add all the memory
info objects in ascending order beased on the memory base
address value in each object.
save_acpi_context_FAR
core\em\s3acpi.asm
This routine saves the ACPI related system context to be used by in
S3 wakeup.
mov al, EQU_ACPI_STORE_CTXT
call GenerateSwSmi_FAR
AcpiSwSmiValues
build\kernel.asm
;EQU_ACPI_ENABLE
;EQU_ACPI_DISABLE
;EQU_ACPI_STORE_CTXT
AcpiSwSmiHandlers_FAR
build\kernel.asm
;AcpiEnableLink_FAR
;AcpiDisableLink_FAR
;StoreAcpiContext_S3
StoreAcpiContext_S3
build\kernel.asm
;Save system context to be restored on S3 resume path
call InitCpContext_ptr core\em\acpi\s3acpi.asm
;This routine initializes start pointer to save chipset
call Save_ChipsetContext_nvs csp\em\acpi\runacpin.asm
;This saves PCI chipset context in ExtendedCMOS memory
call SavePCIcontext_ram core\em\acpi\s3acpi.asm
;This routine stores PCI context scanning PCI_context_table
;register map to PCI_CONTEXT buffer.
call GetCpContextPtr
core\em\acpi\s3acpi.asm
;This routine returns current pointer within save chipset
;context buffer in Type4_NVS space
call SB_StorePciContext_ram csp\em\acpi\runacpin.asm
;This routine will save PCI context to the address
;returned by cs:pCpContext_ptr pointer. Pointer must be
;updated on exit from the routine
call SetCpContextPtr
core\em\acpi\s3acpi.asm
;This routine updates current pointer within save chipset
;context buffer in Type4_NVS space
call SaveMemIOcontext_ram core\em\acpi\s3acpi.asm
;This routine stores PCI Memory mapped IO context scanning
;PCI_context_table register map to PCI_CONTEXT buffer.
call SaveIOcontext_ram
core\em\acpi\s3acpi.asm
;This routine stores IO context scanning IO_context_table
;register map to IO_CONTEXT buffer.
call SaveSIOcontext_ram
core\em\acpi\s3acpi.asm
;This routine stores IO context scanning SIO_context_table
;register map to SIO_CONTEXT buffer.
call Update_RestoreAcpiContext_seg bsp\em\acpi\oemracpi.asm
;This routine will update the segment of RestoreAcpiContext_S3
;for restore system context on S3 resume path.
3.2 ACPI S3 Resume
CheckAndWakeupSystem
core\src\ub.asm
CHECK_POINT_INI 0D1h
Checks if the system is coming back from ACPI S3 or if it is
just a normal boot.
If system is waking up from ACPI S3,
control branches to wake-up path and does not come back here.
WakeupSystem
bbkernel.asm
csp\nbbb.asm
CHECK_POINT_INI 0DCh
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook must be ported to handle the following
tasks, to wake-up the system from ACPI-S3 state.
1. Enable SMRAM, if controlled NB.
2. Restore NB registers from CMOS.
3. Do any other NB specific initialization needed in wakeup
csp\sbbb.asm
CHECK_POINT_INI 0DDh
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook must be ported to handle the following
tasks, to wake-up the system from ACPI-S3 state.
1. Enable SMRAM, if controlled SB.
2. Restore SB registers from CMOS, if required.
3. Do any other SB specific programming needed in wakeup path.
OEM_Wakeup
bsp\oembb.asm
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook can be ported to handle any OEM specific
programming needed in wakeup path.
csp\cspbb.asm
CHECK_POINT_INI 0DEh
This hook gets called after power-on initialization, only if
the TD Hook &CpCheckResumeSP& indicates that that system is
resuming. This hook must be ported to handle the following
1. Enable SMRAM.
2. Restore chipset registers needed in resume path.
3. Do any kind of programming needed before giving control to
wakup routine in SMRAM area.
4. Finally, give control to wake-up routine in SMRAM area,
for waking-up the system.
;; Give control to wake-up routine in SMRAM area.
ax, MKF_SMRAMSEG SMRAM Seg.
DS = SMRAM Seg.
DWORD PTR ds:[0010h]
SMI_BSPENTRYSEG:[10h]
csp\em\smi\smientry.asm
; FixedEntryProc1 is used during S3 resume. Porting of this proc is
; necessary if s3 resume support has to be implemented.
OFFSET SMI_BSPCSEG:SMI_FixedEntryProc1_FAR
SMI_BSPCSEG
SMI_FixedEntryProc1_FAR
csp\em\smi\sbsmi.asm
Fixed Entry Point defined in SMI Code that can be used for
a known entry into SMI code.
FixedEntryProc1 is used to enable the F000 Shadow code
used during S3 resume. We need a fixed entry location in SMI
code that can be used to enable the F000 shadow ram and jump
to the fixed reset entry location (F000:FFF0) after enabling
the F000 region.
Following steps are done here,
1. Set DS to 0000h and stack to a valid location
2. Enable F000 Shadow region
3. Jump to F000:FFF0h
cpu_reset_vector
core\src\jmp.asm
CPU Reset Vector at F000:FFF0.
dw offset RUN_CSEG:reset_e05b
dw RUN_CSEG
jmp to F000:E05B
reset_e05b
core\src\jmp.asm
core\src\bios.asm
Entry point to the Runtime BIOS in F000 shadow RAM.
Control come here after CPU soft reset of if there is a jump
to the CPU_Reset_Vector.
From CPU_Reset_Vector (F000:FFF0)
there is a jump to F000:E05B, and from there controls comes
directly here for SHUTDOWN RESET SHUTDOWN PROCESSING
core\em\acpi\runacpi.asm
This routine can be used to implement ACPI S2/S3 resume.
If not S2/S3 wake up, just return control by JMP WAKE_UP_END
If S2/S3 wake up, initialize context, jmp to Wake Up vector.
call RestoreOemContext_FAR build\kernel.asm
call restore_acpi_context
call FreezeDrive_FAR
restore_acpi_context bsp\em\acpi\oemracpi.asm
dw offset SMI_BSPCSEG:RestoreAcpiContext_S3
RestoreAcpiContext_seg label word
dw 0 ; SMI_BSPCSEG
RestoreAcpiContext_S3
build\kernel.asm
call InitCpContext_ptr
core\em\acpi\s3acpi.asm
call init_timer_FAR
core\em\acpi\s3acpi.asm
call init_dma_FAR
core\em\acpi\s3acpi.asm
call init_pic_FAR
core\em\acpi\s3acpi.asm
call RestorePCIContext_ram core\em\acpi\s3acpi.asm
call GetCpContextPtr
core\em\acpi\s3acpi.asm
call SB_RestorePciContext_ram csp\em\acpi\runacpis.asm
call SetCpContextPtr
core\em\acpi\s3acpi.asm
call RestoreMemIOContext_ram core\em\acpi\s3acpi.asm
call RestoreIOContext_ram
core\em\acpi\s3acpi.asm
call RestoreSIOContext_ram core\em\acpi\s3acpi.asm
call EnableSciBit
core\em\acpi\runacpi.asm
call SB_ProgramACPIRegs
csp\em\acpi\h_acpi.asm
call OEM_RestoreAcpiContext_S3 bsp\em\acpi\oemracpi.asm
; Get Wakeup Vector Address from FACS
mov esi, cs:rsdt_ptr
add esi, FACS_TBL_OFFSET + 0CH
mov eax, dword ptr ds:[esi] ; esi = 32 bit pointer to FACS table fw_wake_vector field
mov ebx, eax
; Store 32 bit offset of Wakeup Vector
and eax, 000FFFF0h
; Mask segment-significant bits
shl eax, 12
; Place segment-significant bits in upper word of EAX
and ebx, 0000000Fh
; Mask offset-significant bits
mov ax, bx
; Place offset-significant bits in AX
Put the Wakeup Vector back to FACS in the Seg:Ofs format
mov dword ptr ds:[esi], eax
Jump to OS wakeup code
jmp dword ptr ds:[esi]
OS....OS...
-------------------------------------------------------------------------
AMI Debug
See Demo
-------------------------------------------------------------------------
OEMBoard
2. PROJECT
webmaster@bios</ 2,电擦除 EPROM 3,EEPROM 4,FLASH Memory BIOS 维修网站,提供 bios 相关服务,网址:www.bios</ 多功能编程器使用说明 ASD AE...最简单的方法就是吧主板BIOS放的编程器里选择备份_电脑基础知识_IT/计算机_专业资料。最简单的方法就是吧主板 BIOS 放的编程器里选择备份,选择存放。 麻烦点的就...USB_SPI_编程器最新主板25系列BIOS芯片介绍_互联网_IT/计算机_专业资料。USB_SPI_编程器最新主板 25 系列 BIOS 芯片介绍最近有好多网友询问,为什么我的主板上找不...2010款全功能BIOS编程器PCB6.0E操作说明_计算机软件及应用_IT/计算机_专业资料。今日推荐 89份文档 爆笑大撞脸 超爆笑笑话 有趣及爆笑图片汇集 绝对经典搞笑照片68...华硕主板编程器刷BIOS MAC地址无效的问题_计算机硬件及网络_IT/计算机_专业资料。对应华硕板P5G-MX、P5GC-MX等 近日修的几片华硕板 P5G-MX、 P5GC-MX 等, L2...主板BIOS修改终极大法_IT/计算机_专业资料。主板BIOS修改终极大法含BIOS编程如何换BIOS 如何DIY BIOS 种种非常详细 在老一代 DIY 玩家眼中,BIOS 是电脑入门的必修...操作 系统对硬盘、光驱、键盘、显示器等外围设备的管理,都是直接建立在 BIOS 系统中断服务 程序的基础上的, 它是 PC 系统中的软件与硬件之间的一个可编程接口。...EEPROM 由于 EPROM 操作的不便, 586 以后的主板上 BIOS ROM 芯片大部分都采用 EEPROM (Electrically Erasable Programmable ROM, 电可擦除可编程 ROM) 。 通过...汇编语言程序设计(第四版)第1~4章【课后答案】_理学_高等教育_教育专区。已经...ROM-BIOS 是计算机系统中用来提供最低级、最直接的硬件控 制的程序。 〔习题 ...本文是着重通过对动画程序的设计实现汇编语言程序设计。阐述动画汇编程序的设计 思路与方案,绘制程序流程图,运用 8086CPU 提供的指令、伪指令、宏指令及 DOS,BIOS ...
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