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贴数:22&分页:SunRise发信人: SunAndrew (SunRise), 信区: FPGATech
标&&题: 求助：altera Uniphy DDR3控制器怎么跑不起来？？
发信站: 水木社区 (Mon Jan&&7 16:13:10 2013), 站内 && 自己整了一个cyclone V的板子上面挂了一个美光16位DDR3，我选的FPGA内部自带DDR3硬核控制器。自己跑了一个小工程来测试UNIPHY硬核控制器。按照手册的时序写了一个测试模块，就是往一个固定地址写累加的数再读出来。（ip核自带的例程看不懂只能直接硬着头皮写了）。工程建好后分配好了管脚，运行了ip核自带的一系列.tcl脚本，综合没有错误，但警告一大堆。直接下板子没反应，测了以下afi_clk是有300M的时钟。如果要是正常的话init_done初始化完成信号应该是拉高的。
麻烦各位有空帮忙看看，先谢谢了！！
如下是工程的截图
&&&& Warning (10236): Verilog HDL Implicit Net warning at myddr3_p0_acv_hard_io_pads.v(289): created implicit net for "dqs_busout"
Warning (10036): Verilog HDL or VHDL warning at myddr3_p0_acv_hard_memphy.v(434): object "seq_calib_init_reg" assigned a value but never read
Warning (10230): Verilog HDL assignment warning at myddr3_p0_acv_hard_memphy.v(554): truncated value with size 4 to match size of target (1)
Warning (10034): Output port "ddio_phy_dqdin[179..68]" at myddr3_p0_acv_hard_io_pads.v(192) has no driver
Warning (10034): Output port "ddio_phy_dqdin[35..32]" at myddr3_p0_acv_hard_io_pads.v(192) has no driver
Warning (10036): Verilog HDL or VHDL warning at myddr3_dmaster_b2p_adapter.v(28): object "out_channel" assigned a value but never read
Warning (10230): Verilog HDL assignment warning at myddr3_dmaster_b2p_adapter.v(40): truncated value with size 8 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at altera_mem_if_hard_memory_controller_top_cyclonev.sv(1166): truncated value with size 320 to match size of target (32)
Warning (10230): Verilog HDL assignment warning at altera_mem_if_hard_memory_controller_top_cyclonev.sv(1167): truncated value with size 320 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at altera_mem_if_hard_memory_controller_top_cyclonev.sv(1168): truncated value with size 320 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at altera_mem_if_hard_memory_controller_top_cyclonev.sv(1169): truncated value with size 320 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at altera_mem_if_hard_memory_controller_top_cyclonev.sv(1170): truncated value with size 320 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at altera_mem_if_hard_memory_controller_top_cyclonev.sv(1171): truncated value with size 320 to match size of target (1)
Warning (10034): Output port "phout" at altera_pll.v(275) has no driver
Warning (10034): Output port "cascade_out" at altera_pll.v(276) has no driver
Warning (10541): VHDL Signal Declaration warning at ddr3_ctrl.vhd(35): used implicit default value for signal "row_addr" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
Warning (10541): VHDL Signal Declaration warning at ddr3_ctrl.vhd(36): used implicit default value for signal "col_addr" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
Warning (10541): VHDL Signal Declaration warning at ddr3_ctrl.vhd(37): used implicit default value for signal "ba_addr" because signal was never assigned a value or an explicit default value. Use of implicit default value may introduce unintended design optimizations.
Warning (10036): Verilog HDL or VHDL warning at ddr3_ctrl.vhd(38): object "a_addr" assigned a value but never read
Warning (10036): Verilog HDL or VHDL warning at ddr3_ctrl.vhd(39): object "ddr_rdata" assigned a value but never read
Warning (10631): VHDL Process Statement warning at ddr3_ctrl.vhd(45): inferring latch(es) for signal or variable "avl_wdata", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at ddr3_ctrl.vhd(45): inferring latch(es) for signal or variable "avl_addr", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at ddr3_ctrl.vhd(45): inferring latch(es) for signal or variable "oct_rzqin", which holds its previous value in one or more paths through the process
Warning (12020): Port "phy_ddio_address" on the entity instantiation of "uaddr_cmd_pads" is connected to a signal of width 64. The formal width of the signal in the module is 56.&&The extra bits will be ignored.
Warning (12020): Port "phy_ddio_cke" on the entity instantiation of "uaddr_cmd_pads" is connected to a signal of width 8. The formal width of the signal in the module is 4.&&The extra bits will be ignored.
Warning (12020): Port "phy_ddio_cs_n" on the entity instantiation of "uaddr_cmd_pads" is connected to a signal of width 8. The formal width of the signal in the module is 4.&&The extra bits will be ignored.
Warning (12020): Port "phy_ddio_odt" on the entity instantiation of "uaddr_cmd_pads" is connected to a signal of width 8. The formal width of the signal in the module is 4.&&The extra bits will be ignored.
Warning (12010): Port "phy_ddio_dmdout" on the entity instantiation of "uio_pads" is connected to a signal of width 20. The formal width of the signal in the module is 25.&&The extra bits will be driven by GND.
Warning (12010): Port "read_capture_clk" on the entity instantiation of "ureset" is connected to a signal of width 1. The formal width of the signal in the module is 2.&&The extra bits will be driven by GND.
Warning (12000): Port "mem_cas_n" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_cas_n[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_ck" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_ck[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_ck_n" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_ck_n[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_cke" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_cke[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_cs_n" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_cs_n[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_odt" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_odt[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_ras_n" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_ras_n[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (12000): Port "mem_we_n" in macrofunction "inst" has no range declared,the Quartus II software will connect the port to pin "mem_we_n[0]" because the pin is a member of a single bit bus with the same name as the port
Warning (14284): Synthesized away the following node(s): &&&& Warning (14285): Synthesized away the following PLL node(s): &&&&&&&& Warning (14320): Synthesized away node "mypll:inst13|mypll_0002:mypll_inst|altera_pll:altera_pll_i|outclk_wire[1]" &&&&&&&& Warning (14320): Synthesized away node "myddr3:inst|myddr3_0002:myddr3_inst|myddr3_pll0:pll0|afi_phy_clk" &&&&&&&& Warning (14320): Synthesized away node "myddr3:inst|myddr3_0002:myddr3_inst|myddr3_pll0:pll0|pll_mem_clk" &&&&&&&& Warning (14320): Synthesized away node "myddr3:inst|myddr3_0002:myddr3_inst|myddr3_pll0:pll0|pll_addr_cmd_clk"
Warning (20013): Ignored assignments for entity "mypll0" -- entity does not exist in design &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity mypll0 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity mypll0 -sip mypll0.sip -library lib_mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.1 -entity mypll0 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.1 -entity mypll0 -sip mypll0.sip -library lib_mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity mypll0 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity mypll0 -sip mypll0.sip -library lib_mypll0 was ignored
Warning (20013): Ignored assignments for entity "mypll0_0002" -- entity does not exist in design &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity mypll0_0002 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.1 -entity mypll0_0002 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity mypll0_0002 -qip mypll0.qip -library mypll0 was ignored
Warning (21300): LOCKED port on the PLL is not properly connected on instance "mypll:inst13|mypll_0002:mypll_inst|altera_pll:altera_pll_i|general[0].gpll". The LOCKED port on the PLL should be connected when the FBOUTCLK port is connected. Although it is unnecessary to connect the LOCKED signal, any logic driven off of an output clock of the PLL will not know when the PLL is locked and ready.
Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
Warning (181009): DQ I/O pins fed by DQS I/O pin "I/O pad men_dqs_p[0]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard &&&& Info (181010): I/O pin "I/O pad men_dq[6]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[1]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[3]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[4]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[5]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[7]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dm[0]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[0]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[2]" of type DQ has I/O standard assignment of SSTL-15 Class I
Warning (181009): DQ I/O pins fed by DQS I/O pin "I/O pad men_dqs_p[1]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard &&&& Info (181010): I/O pin "I/O pad men_dq[15]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[8]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dm[1]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[10]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[12]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[13]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[14]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[9]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[11]" of type DQ has I/O standard assignment of SSTL-15 Class I
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Warning (332174): Ignored filter at myddr3_p0.sdc(265): _UNDEFINED_PIN_ could not be matched with a port or pin or register or keeper or net
Warning (332049): Ignored create_clock at myddr3_p0.sdc(265): Argument &targets& is not an object ID &&&& Info (332050): create_clock -period $t(refCK) -waveform [ list 0 $ref_half_period ] $pll_ref_clock
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332174): Ignored filter at myddr3_p0.sdc(354): inst|myddr3_inst|pll0|pll_write_clk could not be matched with a clock
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(354): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqs_out_clock(dst) -name $dqs_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(357): men_dqs_p[0]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(357): Argument -to with value [get_clocks {men_dqs_p[0]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqs_out_clock(dst)_OUT ] 0
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(354): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqs_out_clock(dst) -name $dqs_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(357): men_dqs_p[1]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(357): Argument -to with value [get_clocks {men_dqs_p[1]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqs_out_clock(dst)_OUT ] 0
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(363): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqsn_out_clock(dst) -name $dqsn_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(366): men_dqs_n[0]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(366): Argument -to with value [get_clocks {men_dqs_n[0]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqsn_out_clock(dst)_OUT ] 0
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(363): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqsn_out_clock(dst) -name $dqsn_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(366): men_dqs_n[1]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(366): Argument -to with value [get_clocks {men_dqs_n[1]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqsn_out_clock(dst)_OUT ] 0
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(421): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks $dqs_out_clock(dst)_OUT ] [get_ports $dqs_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(424): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks $dqs_out_clock(dst)_OUT ] [get_ports $dqs_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(421): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks $dqs_out_clock(dst)_OUT ] [get_ports $dqs_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(424): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks $dqs_out_clock(dst)_OUT ] [get_ports $dqs_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(433): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks $dqsn_out_clock(dst)_OUT ] [get_ports $dqsn_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(436): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks $dqsn_out_clock(dst)_OUT ] [get_ports $dqsn_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(433): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks $dqsn_out_clock(dst)_OUT ] [get_ports $dqsn_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(436): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks $dqsn_out_clock(dst)_OUT ] [get_ports $dqsn_out_clock(dm_pin)] -add_delay
Warning (332049): Ignored set_false_path at myddr3_p0.sdc(449): Argument &from& is an empty collection &&&& Info (332050): set_false_path -to [get_clocks $ck_pin] -fall_from [get_clocks $local_pll_write_clk ]&& Warning (332049): Ignored set_false_path at myddr3_p0.sdc(476): Argument &from& is an empty collection &&&& Info (332050): set_false_path -fall_from [ get_clocks ${local_pll_write_clk} ] -to [ get_ports $ac_pins ]
Warning (332174): Ignored filter at myddr3_p0.sdc(496): inst|myddr3_inst|pll0|pll_avl_clk could not be matched with a clock
Warning (332049): Ignored set_multicycle_path at myddr3_p0.sdc(496): Argument &from& is an empty collection &&&& Info (332050): set_multicycle_path -from [get_clocks $local_pll_write_clk] -to [get_clocks $local_pll_avl_clock] -start -setup 2
Warning (332049): Ignored set_multicycle_path at myddr3_p0.sdc(496): Argument &to& is an empty collection
Warning (332049): Ignored set_multicycle_path at myddr3_p0.sdc(497): Argument &from& is an empty collection &&&& Info (332050): set_multicycle_path -from [get_clocks $local_pll_write_clk] -to [get_clocks $local_pll_avl_clock] -start -hold 1
Warning (332049): Ignored set_multicycle_path at myddr3_p0.sdc(497): Argument &to& is an empty collection
Warning (332174): Ignored filter at myddr3_p0.sdc(582): men_dqs_n[0]_OUT could not be matched with a clock
Warning (332174): Ignored filter at myddr3_p0.sdc(582): men_dqs_p[0]_OUT could not be matched with a clock
Warning (332174): Ignored filter at myddr3_p0.sdc(585): inst|myddr3_inst|pll0|pll_afi_clk could not be matched with a clock
Warning (332049): Ignored set_false_path at myddr3_p0.sdc(585): Argument &from& is an empty collection &&&& Info (332050): set_false_path -from [get_clocks $local_pll_afi_clk] -to [get_clocks $dqs_in_clock(dqs_pin)_IN]
Warning (332174): Ignored filter at myddr3_p0.sdc(582): men_dqs_n[1]_OUT could not be matched with a clock
Warning (332174): Ignored filter at myddr3_p0.sdc(582): men_dqs_p[1]_OUT could not be matched with a clock
Warning (332049): Ignored set_false_path at myddr3_p0.sdc(585): Argument &from& is an empty collection &&&& Info (332050): set_false_path -from [get_clocks $local_pll_afi_clk] -to [get_clocks $dqs_in_clock(dqs_pin)_IN]
Warning (332049): Ignored set_false_path at myddr3_p0.sdc(592): Argument &to& is an empty collection &&&& Info (332050): set_false_path -from $read_fifo_reset -to [ get_clocks $dqs_out_clock(dst)_OUT ]
Warning (332049): Ignored set_false_path at myddr3_p0.sdc(592): Argument &to& is an empty collection &&&& Info (332050): set_false_path -from $read_fifo_reset -to [ get_clocks $dqs_out_clock(dst)_OUT ]
Warning (332049): Ignored set_false_path at myddr3_p0.sdc(596): Argument &from& is an empty collection &&&& Info (332050): set_false_path -from [get_clocks $local_pll_write_clk] -to [get_clocks {*_IN}]
Warning (332087): The master clock for this clock assignment could not be derived.&&Clock: men_clk was not created. &&&& Warning (332034): Specified master clock: inst|myddr3_inst|pll0|pll_write_clk not found on or feeding the specified source node: inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Warning (332087): The master clock for this clock assignment could not be derived.&&Clock: men_clk_n was not created. &&&& Warning (332034): Specified master clock: inst|myddr3_inst|pll0|pll_write_clk not found on or feeding the specified source node: inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Warning (332060): Node: clk_50m was determined to be a clock but was found without an associated clock assignment.
Warning (332056): PLL cross checking found inconsistent PLL clock settings: &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[0] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[1] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[2] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[3] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[4] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[5] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[6] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst|myddr3_inst|pll0|pll1~FRACTIONAL_PLL|vcoph[7] was found missing 1 generated clock that corresponds to a base clock with a period of: 8.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[0] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[1] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[2] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[3] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[4] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[5] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[6] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000 &&&& Warning (332056): Node: inst13|mypll_inst|altera_pll_i|general[0].gpll~FRACTIONAL_PLL|vcoph[7] was found missing 1 generated clock that corresponds to a base clock with a period of: 20.000
Warning (181009): DQ I/O pins fed by DQS I/O pin "I/O pad men_dqs_p[0]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard &&&& Info (181010): I/O pin "I/O pad men_dq[6]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[1]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[3]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[4]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[5]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[7]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dm[0]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[0]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[2]" of type DQ has I/O standard assignment of SSTL-15 Class I
Warning (181009): DQ I/O pins fed by DQS I/O pin "I/O pad men_dqs_p[1]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard &&&& Info (181010): I/O pin "I/O pad men_dq[15]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[8]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dm[1]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[10]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[12]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[13]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[14]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[9]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[11]" of type DQ has I/O standard assignment of SSTL-15 Class I
Warning (177007): PLL(s) placed in location FRACTIONALPLL_X89_Y74_N0 do not have a PLL clock to compensate specified - the Fitter will attempt to compensate all PLL clocks &&&& Info (177008): PLL mypll:inst13|mypll_0002:mypll_inst|altera_pll:altera_pll_i|general[0].gpll~FRACTIONAL_PLL
Warning (181009): DQ I/O pins fed by DQS I/O pin "I/O pad men_dqs_p[0]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard &&&& Info (181010): I/O pin "I/O pad men_dq[6]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[1]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[3]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[4]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[5]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[7]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dm[0]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[0]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[2]" of type DQ has I/O standard assignment of SSTL-15 Class I
Warning (181009): DQ I/O pins fed by DQS I/O pin "I/O pad men_dqs_p[1]" assigned different I/O standards -- it is recommended that all DQ I/O pins fed by the same DQS I/O pin have the same I/O standard &&&& Info (181010): I/O pin "I/O pad men_dq[15]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[8]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dm[1]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[10]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[12]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[13]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[14]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[9]" of type DQ has I/O standard assignment of SSTL-15 Class I &&&& Info (181010): I/O pin "I/O pad men_dq[11]" of type DQ has I/O standard assignment of SSTL-15 Class I
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Warning (15709): Ignored I/O standard assignments to the following nodes &&&& Warning (15710): Ignored I/O standard assignment to node "_UNDEFINED_PIN_"
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Warning (334000): Timing characteristics of device 5CGXFC7D6F31C7ES are preliminary
Warning (334000): Timing characteristics of device 5CGXFC7D6F31C7ES are preliminary
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
Warning (20013): Ignored assignments for entity "mypll0" -- entity does not exist in design &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity mypll0 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity mypll0 -sip mypll0.sip -library lib_mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.1 -entity mypll0 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.1 -entity mypll0 -sip mypll0.sip -library lib_mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity mypll0 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity mypll0 -sip mypll0.sip -library lib_mypll0 was ignored
Warning (20013): Ignored assignments for entity "mypll0_0002" -- entity does not exist in design &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME altera_pll -entity mypll0_0002 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.1 -entity mypll0_0002 -qip mypll0.qip -library mypll0 was ignored &&&& Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV mwpim -entity mypll0_0002 -qip mypll0.qip -library mypll0 was ignored
Critical Warning: PLL clock inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk not driven by a dedicated clock pin or neighboring PLL source.&&To ensure minimum jitter on memory interface clock outputs, the PLL clock source should be a dedicated PLL input clock pin or an output of the neighboring PLL. Timing analyses may not be valid.
Critical Warning: Could not find PLL clock for inst|myddr3_inst|pll0|pll2_phy~PLL_OUTPUT_COUNTER|divclk
Critical Warning: myddr3_p0_pin_map.tcl: Failed to find PLL reference clock
Warning (332174): Ignored filter at myddr3_p0.sdc(265): _UNDEFINED_PIN_ could not be matched with a port or pin or register or keeper or net
Warning (332049): Ignored create_clock at myddr3_p0.sdc(265): Argument &targets& is not an object ID &&&& Info (332050): create_clock -period $t(refCK) -waveform [ list 0 $ref_half_period ] $pll_ref_clock
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332049): Ignored create_generated_clock at myddr3_p0_pin_map.tcl(167): Argument -source is not an object ID &&&& Info (332050): create_generated_clock&&-name $clock_name&&-source $opts(-source)&&-multiply_by $opts(-multiply_by)&&-divide_by $opts(-divide_by)&&-phase $opts(-phase)&&$opts(-target)
Warning (332174): Ignored filter at myddr3_p0.sdc(354): inst|myddr3_inst|pll0|pll_write_clk could not be matched with a clock
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(354): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqs_out_clock(dst) -name $dqs_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(357): men_dqs_p[0]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(357): Argument -to with value [get_clocks {men_dqs_p[0]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqs_out_clock(dst)_OUT ] 0
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(354): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqs_out_clock(dst) -name $dqs_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(357): men_dqs_p[1]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(357): Argument -to with value [get_clocks {men_dqs_p[1]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqs_out_clock(dst)_OUT ] 0
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(363): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqsn_out_clock(dst) -name $dqsn_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(366): men_dqs_n[0]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(366): Argument -to with value [get_clocks {men_dqs_n[0]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqsn_out_clock(dst)_OUT ] 0
Warning (332049): Ignored create_generated_clock at myddr3_p0.sdc(363): Argument: -master_clock must contain exactly one valid clock. &&&& Info (332050): create_generated_clock -multiply_by 1 -master_clock [get_clocks $local_pll_write_clk] -source $pll_write_clock $dqsn_out_clock(dst) -name $dqsn_out_clock(dst)_OUT -add
Warning (332174): Ignored filter at myddr3_p0.sdc(366): men_dqs_n[1]_OUT could not be matched with a clock
Warning (332049): Ignored set_clock_uncertainty at myddr3_p0.sdc(366): Argument -to with value [get_clocks {men_dqs_n[1]_OUT}] contains zero elements &&&& Info (332050): set_clock_uncertainty -to [ get_clocks $dqsn_out_clock(dst)_OUT ] 0
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(399): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(402): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqs_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -max $data_output_max_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(409): Argument -clock is an empty collection &&&& Info (332050): set_output_delay -min $data_output_min_delay -clock [get_clocks ${dqsn_pin}_OUT ] [get_ports $dq_pin] -add_delay
Warning (332049): Ignored set_output_delay at myddr3_p0.sdc(412): Argument -clock is an e}